Sony WLL-RX50 Maintenance Manual page 41

CXD9153R (SONY)
OFDM DEMODULATOR
—TOP VIEW—
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160
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185
190
195
200
205
208
PIN PIN
I/O SIGNAL I/O SIGNAL
NO. NO.
PD0 TCK6
1 I 53 I
TESTSW0 D.V
2 I 54 — CC
3 — D.GND 55 — D.GND
TESTSW1 TDILDB0
4 I 56 I/O
5 — A.GND 57 I/O TDILDB1
A.V TDILDB2
6 — CC 58 I/O
7 O ADVRH 59 I/O TDILDB3
AIFDT D.GND
8 I 60 —
9 — A.GND 61 — D.V
CC
A.GND
10 — 62 I/O TDILDB4
11 O AOUT 63 I/O TDILDB5
12 O DAVRN 64 I/O TDILDB6
DAVRP TDILDB7
13 O 65 I/O
14 — A.V 66 I/O TDILDB8
CC
D.GND TDILDB9
15 — 67 I/O
16 I CRESET 68 I/O TDILDB10
EA TDILDB11
17 I 69 I/O
18 I EXCKEN 70 — D.V
CC
D.V
19 — CC 71 I/O TDILDB12
20 I CLOCK 72 — D.GND
IBUSDT0
21 I 73 — D.V
CC
IBUSDT1 TDILDB13
22 I 74 I/O
23 I IBUSDT2 75 I/O TDILDB14
TCK7
TDILDB15
24 I 76 I/O
25 I PLLA 77 O OTDILCS
A.GND
26 — 78 O OTDILWE
27 — A.V 79 — D.V
CC CC
IBUSDT3
28 I 80 O OTDILOE
29 I IBUSDT4 81 I NWR
IBUSDT5
30 I 82 I/O SDA
31 I IBUSDT6 83 I/O SCL
32 I IBUSDT7 84 — D.V
CC
TCK0
D.GND
33 I 85 —
34 — D.V 86 — D.V
CC CC
IBUSDT8
35 I 87 I NRD
36 I IBUSDT9 88 O NOE
TCK1
37 I 89 O INTR
38 — D.GND 90 O ICERR
TCK2
39 I 91 O OTDILAB0
40 I IBUSDT10 92 O OTDILAB1
IBUSDT11
41 I 93 O OTDILAB2
TCK3
42 I 94 O
OTDILAB3
43 — D.V 95 O OTDILAB4
CC
IBUSDT12
44 I 96 — D.GND
TCK4
45 I 97 — D.V
CC
D.GND
46 — 98 O OSCLK
47 I IBUSDT13 99 O OTDILAB5
IBUSDT14
48 I 100 O OTDILAB6
49 I RESET 101 O OTDILAB7
D.GND
50 — 102 O OTDILAB8
TCK5
51 I 103 O
OTDILAB9
IBUSDT15
52 I 104 O OTDILAB10
WLL-RX50
104
100
95
90
85
80
75
70
65
60
55
53
PIN PIN
I/O SIGNAL I/O SIGNAL
NO. NO.
OTDILAB11 OBUSADT9
105 O 157 O
OTDILAB12 OBUSADT10
106 O 158 O
107 — D.GND 159 O OBUSADT11
OBCLK OBUSADT12
108 O 160 O
109 O OTDILAB13 161 O OBUSADT13
OTDILAB14 OBUSADT14
110 O 162 O
111 O OTDILAB15 163 O OBUSADT15
OTDILAB16 D.GND
112 O 164 —
113 O OTDILAB17 165 — D.V
CC
114 — D.V 166 O OFCLK
CC
115 O OQCLK 167 O OBUSADT16
116 O OTDILAB18 168 O OBUSADT17
OTDILAB19 OBUSADT18
117 O 169 O
118 O OTDILAB20 170 O OBUSADT19
D.GND OBUSADT20
119 — 171 O
120 I SMPCK 172 O OBUSADT21
OTDILAB21 OBUSADT22
121 O 173 O
122 O OHCLK 174 O OBUSADT23
123 — D.V 175 O OBUSADT24
CC
124 O OASIEN 176 — D.GND
125 O OTPSERR 177 — D.V
CC
OTPSST OBUSADT25
126 O 178 O
127 O OTPSDT 179 O OBUSADT26
OTSERR OBUSADT27
128 O 180 O
129 — D.V 181 O OBUSADT28
CC
130 — D.GND 182 — D.V
CC
131 — D.V 183 — D.V
CC CC
132 O OTSVAL 184 O OBUSADT29
133 O OTSST 185 O OBUSADT30
134 O OTSDT0 186 O OBUSADT31
135 O OTSDT1 187 I/O OAGCP
PD1
136 O OTSDT2 188 I
OTSDT3 D.GND
137 O 189 —
138 — D.V 190 — D.V
CC CC
139 O OTSDT4 191 O TDO
140 O OTSDT5 192 O PLLL
PD2
141 O OTSDT6 193 I
142 — D.GND 194 I ADR0
143 O OTSDT7 195 I ADR1
144 O OTCLK 196 I CCR0
145 O OBUSADT0 197 I CCR1
146 O 198 I
OBUSADT1 BUSEN
147 — D.V 199 I TRST
CC
148 O OBUSADT2 200 — D.GND
149 O OBUSADT3 201 — D.V
CC
150 O OBUSADT4 202 I TCK
151 O OBUSADT5 203 I TDI
152 O OBUSADT6 204 I TMS
153 O OBUSADT7 205 I ADR3
154 — D.GND 206 I ADR2
155 O 207 I
ODCLK CNFGEN
156 O OBUSADT8 208 I CNFGSW
INPUTS
ADR0 - ADR3 : IIC ADDRESS
AIFDT : ANALOG INTERMEDIATE FREQUENCY OFDM SIGNAL (4.5 MHz)
BUSEN : BUS ENABLE
CCR0, CCR1 : IIC CLOCK
CLOCK : SYSTEM CLOCK (18 MHz)
CNFGEN : CONFIGURATION ENABLE
CNFGSW : CONFIGURATION SWITCH
CRESET : CLOCK DRIVER RESET
EA : FOR VPD
EXCKEN : CLOCK ENABLE
IBUSDT0 - IBUSDT15 : DATA BUS
NRD : IIC READ ENABLE
NWR : IIC WRITE ENABLE
PD0 PD2
- : POWER DOWN FOR ANALOG BLOCK
PLLA : TEST
RESET : CHIP RESET
SMPCK : SAMPLING CLOCK FOR ASI DATA
TCK, TDI, TMS, TRST : TEST
TCK0
: TEST CLOCK (54.86 MHz)
TCK1
: TEST CLOCK (36.57 MHz)
TCK2
: TEST CLOCK (18.29 MHz)
TCK3
: TEST CLOCK (13.71 MHz)
TCK4
: TEST CLOCK (9.14 MHz)
TCK5
: TEST CLOCK (6.86 MHz)
TCK6
: TEST CLOCK
TCK7
: SCAN TEST CLOCK
TESTSW0, TESTSW1 : TEST MODE
OUTPUTS
ADVRH : REFERENCE VOLTAGE FOR A/D
AOUT : CONTROL VOLTAGE FOR VCXO
DAVRN, DAVRP : REFERENCE VOLTAGE
ICERR : IIC ERROR
INTR : IIC INTERRUPT
NOE : IIC VALID
OASIEN : ASI ENABLE FLAG
OBCLK : OUTPUT BCLK (6.85 MHz)
OBUSADT0 - OBUSADT31 : DATA BUS
ODCLK : OUTPUT DCLK (18.29 MHz)
OFCLK : OUTPUT FCLK (36.57 MHz)
OHCLK : OUTPUT HCLK (54.48 MHz)
OQCLK : OUTPUT QCLK (13.7 MHz)
OSCLK : OUTPUT SCLK (9.14 MHz)
OTCLK : TS PACKET CLOCK
OTDILAB0 - OTDILAB21 : TIME INTERLEAVE ADDRESS
OTDILCS : EXTERNAL SRAM CHIP SELECT
OTDILOE : EXTERNAL SRAM OUTPUT ENABLE
OTDILWE : EXTERNAL SRAM WRITE ENABLE
OTPSDT : TPS DATA
OTPSERR : TPS ERROR FLAG
OTPSST : TPS START FLAG
OTSDT0 - OTSDT7 : TS PACKET DATA
OTSERR : TS PACKET ERROR FLAG
OTSST : TS PACKET START FLAG
OTSVAL : TS PACKET VALID
PLLL : PLL LOCK FLAG
TDO : TEST
INPUTS/OUTPUTS
OAGCP : TRI-STATE BUS
SCL : SERIAL CLOCK
SDA : SERIAL DATA
TDILDB0 - TDILDB15 : TIME INTERLEAVE DATA
IC
5-3