Table 5: Dkhiqv-Pci Jumper Configuration Settings For Multimedia Enabled On B69000 And B65555; Table 6: Dkhiqv-Pci Jumper Configuration Settings For Tv-Out Enabled On B69000 And B65555 - Intel CHIPS HiQVideo Series User Manual

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Table 5: DKHiQV-PCI Jumper configuration settings for TV-out Enabled on B69000 and B65555
NTSC
Jumper
Function*
W2 sh. 5, TV OUT
W4 sh.5, TV OUT
W5 sh.2, TV OUT, disable CRT
W6 sh.5, TV OUT, NTSC
W8 sh.2, TV OUT, TSYNC
JP1 sh.5, TV OUT
JP2 sh.5, TV OUT
JP3 sh.5, TV OUT
JP13 sh.2, CSYNC/HSYNC
Notes: *Schematic reference and functional category
**'on' - jumper plug is installed
'off - jumper plug is not installed
1. For PAL, U1/U4 on DKHiQV-PCI DK board must be replaced with a 17.7344 MHz crystal oscil-
lator.
2. Using BMP utility, change RAM BIOS to enable TV through GPIO0 and enable output
composite sync in NTSC/PAL.
Table 6: DKHiQV-PCI Jumper configuration settings for Multimedia Enabled on B69000 and
Jumper
Notes: *Schematic reference and functional category
&+,36
®
ABHiQV (Fab Rev. C)
User's Guide
Note: Refer to Figure 3 for jumper locations.
2
State**
off
1-2
off
off
off
On
On
On
On
B65555
Note: Refer to Figure 3 for jumper locations.
Function*
JP5 sh.2, I2C
JP6 sh.2, I2C
JP7 sh.2, DDC
JP8 sh.2, DDC
JP9 sh.2, GPIO
JP10 sh.2, GPIO
JP11 sh.2, GPIO
JP12 sh.2, GPIO
**'on' - jumper plug is installed
'off' - jumper plug is not installed
Subject to Change Without Notice
PAL
Jumper
Function*
W2 sh.5, TV OUT
W4 sh.5, TV OUT
W5 sh.5, TV OUT, disable CRT
W6 sh.5, TV OUT, PAL
W8 sh.2, TV OUT, TSYNC
JP1 sh.5, TV OUT
JP2 sh.5, TV OUT
JP3 sh.5, TV OUT
JP13 sh.2, CSYNC/HSYNC
State**
1-2, 3-4
All off
1-2, 3-4
All off
2-3
1-4
1-4, 2-3
off
Revision 1.1
1,2
State**
Off
2-3
Off
On
Off
On
On
On
On
7/15/98