Configuring The Fpga - Xilinx SP623 Getting Started Manual

Procedure
The final SMA cable connections for Duals 101 and 123 are shown in
X-Ref Target - Figure 4
Figure 4: SMA Cable Connections for Dual 101 and 123 Transceivers and Clocks

Configuring the FPGA

1.
2.
3.
10
Plug the 12V output from the power supply into connector J122.
Connect the SP623 board to the Host PC. Either of these cables may be used for this
connection:
• Platform Cable USB-II (DLC10)
• Parallel IV Cable (PC4)
Connect one end of the cable to the host PC. Connect the other end to the download
cable connector (J1) on the SP623 board.
To run the IBERT demonstration on Duals 101 and 123, set the System Ace Controller
Configuration Address switch SW3 to 000 as shown in
determines which of the two bitstreams stored in the CompactFlash card configures
the FPGA.
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Figure 4.
UG752_04_052510
Figure 5. The setting on SW3
SP623 IBERT Getting Started Guide
UG752 (v1.0.1) January 26, 2011