IBM Power Systems S822LC Technical Overview And Introduction page 35

The bandwidth figures for the caches are calculated as follows:
L1 cache: In one clock cycle, two 16-byte load operations and one 16-byte store operation
can be accomplished. The value varies depending on the clock of the core, and the
formulas are as follows:
– 2.860 GHz Core: (2 * 16 B + 1 * 16 B) * 2.860 GHz = 137.28 GBps
– 3.259 GHz Core: (2 * 16 B + 1 * 16 B) * 3.259 GHz = 156.43 GBps
L2 cache: In one clock cycle, one 32-byte load operation and one 16-byte store operation
can be accomplished. The value varies depending on the clock of the core, and the
formula is as follows:
– 2.860 GHz Core: (1 * 32 B + 1 * 16 B) * 2.860 GHz = 137.28 GBps
– 3.259 GHz Core: (1 * 32 B + 1 * 16 B) * 3.259 GHz = 156.43 GBps
L3 cache: One 32-byte load operation and one 32-byte store operation can be
accomplished at half-clock speed, and the formula is as follows:
– 2.860 GHz Core: (1 * 32 B + 1 * 32 B) * 2.860 GHz = 183.04 GBps
– 3.259 GHz Core: (1 * 32 B + 1 * 32 B) * 3.259 GHz = 208.57 GBps
For the entire Power S822LC server populated with the two processor modules, the overall
bandwidths are shown in Table 1-7.
Table 1-7 Power S822LC server - total bandwidth estimates
Total bandwidths
L1 (data) cache
L2 cache
L3 cache
Total memory
PCIe Interconnect
Where:
Total memory bandwidth: Each POWER8 processor has four memory channels running at
9.6 GBps capable of writing 2 bytes and reading 1 byte at a time. The bandwidth formula is
calculated as follows:
Four channels * 9.6 GBps * 3 bytes = 192 GBps per processor module
SMP interconnect: The POWER8 processor has two 2-byte 3-lane A buses working at
6.4 GHz. Each A bus has three active lanes. The bandwidth formula is calculated as
follows:
3 A buses * 2 bytes * 6.4 GHz = 38.4 GBps
PCIe Interconnect: Each POWER8 processor has 32 PCIe lanes running at 8 Gbps
full-duplex. The bandwidth formula is calculated as follows:
Thirty-two lanes * 2 processors * 8 Gbps * 2 = 128 GBps
8335-GCB
20 cores @ 2.860 GHz
2,746 GBps
2,746 GBps
3,661 GBps
230 GBps
128 GBps
Chapter 1. Architecture and technical description
16 cores @ 3.259 GHz
2,503 GBps
2,503 GBps
3,337 GBps
230 GBps
128 GBps
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