Table 2-6 Operation Modes Of Uart; Fig. 2.15 Rdrf Flag Set Timing - Fujitsu F2MC-8L Family series Hardware Manual

Peripherals
Mode Parity
Provided
0
Not provided
Provided
1
Not provided
Provided
3
Not provided
HARDWARE CONFIGURATION
(4) Description of operation
(a) Operation modes
The UART has the operation modes listed in Table 2–6; they can be switched
by setting the value at the serial mode control register 1 (SMC1).
Table 2–6 Operation Modes of UART
Data Length
4 Asynchronous/synchronous
5 Asynchronous/synchronous
7 Asynchronous/synchronous
8 Asynchronous/synchronous
8 Asynchronous/synchronous
9 Asynchronous/synchronous
However, the stop bit length can be specified only for the transmitter
channel. The 1-bit length is always specified for the receiver channel.
(b) Interrupt occurrence and flag setting conditions
The UART has three flags and two interrupt sources.
The three flags are ORFE, RDRF, and TDRE. The ORFE flag is an overrun/
framing error flag which is set when an error occurs at receiving. The RDRF
flag indicates that the receive data is ready at the SIDR register. The TDRE
flag indicates that writing to the transmit data register (SODR) is enabled.
The two interrupt sources are one for receiving, and one for transmitting.
At receiving, an interrupt is requested by the RDRF or ORFE flag. At
transmitting, an interrupt is requested by the TDRE flag.
a. Receiving in modes 0, 1, and 3
Both the RDRF (receive data register full) and ORFE (overrun/framing
error) flags are set when receiving and transfer are completed and the
last stop bit is detected. An interrupt request is then output to the CPU.
When the RDRF flag is active, the received data is transferred to the
serial data input register (SIDR).
Data
RDRF
SIN interrupt

Fig. 2.15 RDRF Flag Set Timing

2– 46
Clock Mode
Stop
Stop Bit Length
1 bit or 2 bits
1 bit or 2 bits
1 bit or 2 bits
1 bit or 2 bits
1 bit or 2 bits
1 bit or 2 bits
(Stop)