Denon AVR-4520CI Service Manual page 224

ADV7850
Pin No. Mnemonic
V1 TX_2+
V2 TX_2-
V3 GND
V4 TX_DDC_SDA
V20 AVDD
V21 AVDD
V22 AVDD
V23 AVDD
W1 TX_1+
W2 TX_1-
W3 GND
W4 TX_HPD
W20 GND
W21 AVOUT2
W22 AVIN9
W23 AVIN8
Y1 TX_0+
Y2 TX_0-
Y3 GND
Y4 GND
Y5 A7
Y6 A3
Y7 A10
Y8 BA0
Y9 CKE
Y10 GND
Y11 DQ6
Y12 DQ7
Y13 DQ0
Y14 DQ8
Y15 UDQS
Y16 SDVDD
Y17 SAVDD
Y18 TRI1
Y19 TRI2
Y20 GND
Y21 AVOUT1
Y22 SYNC3
Y23 AVIN7
AA1 TX_C+
AA2 TX_C-
AA3 TX_AVDD
AA4 GND
AA5 A9
AA6 A5
AA7 A1
AA8 BA1
AA9 WE
AA10 GND
AA11 DQ4
AA12 DQ5
AA13 DQ2
AA14 DQ11
AA15 UDQSN
AA16 SDVDD
AA17 GND
AA18 HS_IN1/TRI7
AA19 VS_IN1/TRI8
AA20 GND
AA21 TRI3
AA22 HS_IN2/TRI5
Description
Digital Output Channel 2 true of the HDMI Tx.
Digital Output Channel 2 complement of the HDMI Tx.
Ground
Serial data for DDC bus of HDMI Tx. TX_DDCA_SDA is 5 V tolerant.
Video Analog supply voltage (1.8V)
Video Analog supply voltage (1.8V)
Video Analog supply voltage (1.8V)
Video Analog supply voltage (1.8V)
Digital Output Channel 1 true of the HDMI Tx.
Digital Output Channel 1 complement of the HDMI Tx.
Ground
Hot Plug Detect signal of the HDMI Tx.
Ground
Analog Video Mux output 2
Analog video mux input channel
Analog video mux input channel
Digital Output Channel 0 true of the HDMI Tx.
Digital Output Channel 0 complement of the HDMI Tx.
Ground
Ground
SDRAM address line
SDRAM address line
SDRAM address line
SDRAM block address signal
SDRAM clock enable
Ground
SDRAM data line
SDRAM data line
SDRAM data line
SDRAM data line
SDRAM upper data strobe true signal
Memory interface supply
SDRAM interface supply
Digital input capable of slicing bi-level or tri-level input from SCART or D-Connector.
Digital input capable of slicing bi-level or tri-level input from SCART or D-Connector.
Ground
Analog Video Mux output 1
This is a synchronization on green or luma input (SOG/SOY) used in embedded
synchronization mode.
Analog video mux input channel
Digital Output clock true of the HDMI Tx.
Digital Output clock complement of the HDMI Tx.
HDMI Tx Analog Supply (1.8V)
Ground
SDRAM address line
SDRAM address line
SDRAM address line
SDRAM block address signal
SDRAM write enable signal
Ground
SDRAM data line
SDRAM data line
SDRAM data line
SDRAM data line
SDRAM upper data strobe compliment signal
Memory interface supply
Ground
HS on Graphics Port. The HS input signal is used for 5-wire timing mode. This ball can
also be used as a trilevel/bilevel input on the SCART or D-terminal connector.
VS on Graphics Port. The VS input signal is used for 5-wire timing mode. This ball can
also be used as a trilevel/bilevel input on the SCART or D-terminal connector.
Ground
Digital input capable of slicing bi-level or tri-level input from SCART or D-Connector.
The HS input signal is used for 5-wire timing mode. This ball can also be used as a
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