Denon AVR-4520CI Service Manual page 214

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PCM1795 (DIGITAL : U0403, U0404, U0405, U0406, U0407, U0408, U0409)
TERMINAL
NAME NO.
AGND1 19
AGND2 24
AGND3L
27
AGND3R 16
BCK
6
DATA 5
DGND 8
L+
I 25
OUT
L–
I 26
OUT
I R+ 17
OUT
I R– 18
OUT
I 20
REF
LRCK
4
MC 12
MDI 11
MDO 13
MS 10
MSEL
3
RST 14
(1) Schmitt-trigger input, 5-V tolerant.
(2) Schmitt-trigger input, 5-V tolerant.
(3) Schmitt-trigger input and output. 5-V tolerant input. In I
CMOS output.
(4) Schmitt-trigger input and output. 5-V tolerant input and CMOS output.
Copyright © 2009, Texas Instruments Incorporated
PIN CONFIGURATION
DB PACKAGE
SSOP-28
(TOP VIEW)
ZEROL 1
ZEROR 2
MSEL 3
4
LRCK
DATA 5
BCK 6
SCL 7
DGND 8
V
9
DD
10
MS
MDI 11
MC 12
MDO 13
RST 14
Table 1. TERMINAL FUNCTIONS
I/O
—
Analog ground (internal bias)
—
Analog ground (internal bias)
— Analog ground (left channel DACFF)
— Analog ground (right channel DACFF)
Bit clock input
(1)
I
I Serial audio data input
—
Digital ground
Left channel analog current output+
O
Left channel analog current output–
O
O Right channel analog current output+
O Right channel analog current output–
—
Output current reference bias pin
Left and right clock (f
I
I Mode control clock input
I Mode control data input
I/O Mode control readback data output
I/OI Mode control chip-select input
2 (2)
I I C/SPI select ; active low SPI select
(2)
I Reset ; active low
C mode, this pin becomes an open-drain 3-state output; otherwise, this pin is a
2
Product Folder Link(s):
V 2L
28
CC
27 AGND3L
I L-
26
OUT
I L+
25
OUT
24 AGND2
V 1
23
CC
V L
22
COM
V R
21
COM
I
20
REF
19 AGND1
I R-
18
OUT
I R+
17
OUT
16 AGND3R
V 2R
15
CC
DESCRIPTION
(2)
(2)
) input
S
(2)
(2)
(3)
(4)
; active low
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PCM1795
214
SLES248 – MAY 2009
7