Denon AVR-4520CI Service Manual page 204

Digital Video Encoder (ConDENC)
SAA7121 Pin Description
PINNING
SYMBOL PIN I/O
res. 1
SP 2
AP 3
LLC 4
V 5
SSD1
V 6
DDD1
RCV1 7 I/O
RCV2 8 I/O
MP7 9
MP6 10
MP5 11
MP4 12
MP3 13
MP2 14
MP1 15
MP0 16
V 17
DDD2
V 18
SSD2
RTCI 19
res. 20
SA 21
res. 22
res. 23
C 24
V 25
DDA1
res. 26
Y 27
28
V
DDA2
res. 29
CVBS 30
31
V
DDA3
V 32
SSA1
V 33
SSA2
XTALO 34
XTALI 35
V 36
DDA4
XCLK 37
1997 Jan 06
−
reserved
I test pin; connected to digital ground for normal operation
I test pin; connected to digital ground for normal operation
I line-locked clock; this is the 27 MHz master clock for the encoder
I digital ground 1
I digital supply voltage 1
raster control 1 for video port; this pin receives/provides a VS/FS/FSEQ signal
raster control 2 for video port; this pin provides an HS pulse of programmable length or
receives an HS pulse
I
I
I
I
MPEG port; it is an input for "CCIR 656" style multiplexed Cb Y, Cr data
I
I
I
I
I digital supply voltage 2
I digital ground 2
I Real Time Control input; if the LLC clock is provided by an SAA7111 or SAA7151B,
RTCI should be connected to pin RTCO of the decoder to improve the signal quality
−
reserved
C-bus slave address select input pin; LOW: slave address = 88H, HIGH = 8CH
2
I the I
−
reserved
−
reserved
O analog output of the chrominance signal
I analog supply voltage 1 for the C DAC
−
reserved
O analog output of VBS signal
I analog supply voltage 2 for the Y DAC
−
reserved
O analog output of the CVBS signal
I analog supply voltage 3 for the CVBS DAC
I analog ground 1 for the DACs
I analog ground 2 for the oscillator and reference voltage
O crystal oscillator output (to crystal)
I crystal oscillator input (from crystal); if the oscillator is not used, this pin should be
connected to ground
I analog supply voltage 4 for the oscillator and reference voltage
O clock output of the crystal oscillator
DESCRIPTION
4
204
SAA7120; SAA7121