Main (Io Expansion) Circuit - Panasonic SA-MAX9000GN Service Manual

12.2. Main (IO Expansion) Circuit

1 2 3
SCHEMATIC DIAGRAM - 1
A
A MAIN (IO EXPANSION) CIRCUIT
US USBLED_REC
USBLED_PLAY1
US
B
MI SP_INT
FA FAN_OUT
R1229
6.8K
QR1201
B1GBCFJJ0040
R1228
39K SWITCH
C
AU ANALOG_SEL
AU ANALOG_SEL2
DSP_MUTE
D DS
DRV_AMP_MUTE
DS
DS DSP_RESET
SE DAMP_MOD_DA
US FE BT SE
DGND
AU FA MI DS DI
E
DI AM_BP
DI PCONT2
DI PCONT3
DI USB_B_PCONT
USB_A_PCONT
DI
MI NRST
AU TUN_RST
F
G
H
1 2 3
4 5 6
: +B SIGNAL LINE : AUX/MIC SIGNAL LINE
R1236 LB1201
10K J0JYC0000656
R1226
12K
44 43 42 41 40 39 38 37 36 35 34
1 33
2 32
KPY11 SCL
[1] VSS [33] SDA
3 KPY10 DIR25 31
4 30
EXITIO0 DIR24
5 29
KPY9 VSS
IC1202
6 VSS KPY7 28
C0ZBZ0002175
7 27
KPY0 IO EXPANDER RESETN
8 26
KPY1 KPX5
9 KPY3 KPY4 25
[11] KPX1 [23] PX4
10 KPY2 24
KPX6
11 23
12 13 14 15 16 17 18 19 20 21 22
R1213 R1214
0 0
IO: MAIN (IO EXPANSION): SCHEMATIC DIAGRAM - 1
FA: MAIN (FAN LED): SCHEMATIC DIAGRAM - 2 ~ 3
DS: MAIN (DSP): SCHEMATIC DIAGRAM - 4
BT: MAIN (AMP BTL): SCHEMATIC DIAGRAM - 5 ~ 6
MI: MAIN (MICON): SCHEMATIC DIAGRAM - 7 ~ 8
SE: MAIN (AMP SINGLE): SCHEMATIC DIAGRAM - 9 ~ 10
FE: MAIN (FE): SCHEMATIC DIAGRAM - 11
DI: MAIN (DIGITAL POWER): SCHEMATIC DIAGRAM - 12 ~ 13
US: MAIN (USB): SCHEMATIC DIAGRAM - 14
AU: MAIN (AUX): SCHEMATIC DIAGRAM - 15
4 5 6
7 8 9
REM_IN
MI
PW_XSW3R3V
DI MI
DS SE FE DI AU PW_SW3R3V
MI
DI PW_SW5R4V_ILUM
PW_FL_SW12V
DI
FL1_CS
MI
FL_SCLK
MI
MI FL_SDO
MI KEY3
MI KEY2
KEY1
MI
VOL_JOG
MI
MI DJ_JOG
SPX_DAT
MI
SP_SDA MI
SPX_CLK
MI
SP_SCL
MI
SPX_STB
MI
I2C_SDA
DS AU MI
DS AU MI I2C_SCL
REG_BP
DI
MI BT_UART_TX
BT_UART_RX
MI
BT_HOST_WAKE
MI
PW_BT_SW4R6V
DI
MI BT_UART_RTS
I2C_SDA
DS AU MI
DS AU MI I2C_SCL
NFC_IRQ
MI
PW_SW12R0V
AU DI
MI MIC_IN
AU MPORT_IN_R
AU DI AGND
MPORT_IN_L
AU
7 8 9
47
10 11 12
R1805
P1802
J0JYC0000656
30
1 REM_IN
PW_STBY3R3V
2
C1804
1000P 3 DGND
4 PW_SW3R3V
C1803 5 PW_SW5V
1000P
6 PW_SW5V
PW_FL12V
7
R1815
8 DGND
4.7K
R1804 J0JYC0000656
9 FL1_CS
R1803 J0JYC0000656
10 FL_CLK
R1802 J0JYC0000656
11 FL_DIN
C1822 1000P
DGND
12
LB1805 J0JYC0000656 C1823 1000P
13 KEY3
LB1804 J0JYC0000656 TO
14 KEY2
LB1801 J0JYC0000656 PANEL CIRCUIT
KEY1
15
C1824 1000P (P6200)
16 DGND
C1810 470P
LB1815 J0JYC0000656 IN SCHEMATIC
17 VOL_JOG
LB1814 J0JYC0000656
DIAGRAM - 19
18 DJ_JOG
C1811 470P
19 DGND
LB1817 J0JYC0000656
20 SPX_DAT
LB1816 J0JYC0000656
21 SPX_CLK
22 DGND
LB1802 J0JYC0000656
SPX_STB
23
LB1803 J0JYC0000656
24 SPX_CLR
25 DGND
R1844 0
26 SP2_SDA
R1843 0
27 SP2_SCL
28 DGND
29 DGND
30 DGND
1
P1804
R1816 J0JYC0000656
1 BT_UART_TX
R1817 J0JYC0000656
2 BT_UART_RX
R1818 J0JYC0000656
3 BT_HOST_WAKE
R1819
J0JYC0000656
4 BT_LOD_ON
5 PW_BT_SW4R6V
R1820 J0JYC0000656
6 BT_UART_RTS
TO NFC P.C.B.
R1811 0
7 NFC_D3R3V
R1822 0
8 NFC_SDA
R1823 0
9 NFC_SCL
10 NFC_IRQ3V
R1821
11 DGND
J0JYC0000656
C1825
12 DGND
1000P
R1808 P1803
J0JYC0000656
9 PW_SW12R0V
R1809 1K
8 MIC_IN
D
R1828 J0JYC0000656
7 MIC_DET_2 TO
R1810 J0JYC0000656
MIC_DET_1 MIC CIRCUIT
6
C1809 1000P
R1806 J0JYC0000656
5 MIC_GND (CN1401)
4 MPORT_IN_R IN SCHEMATIC
3 MPORT_GND DIAGRAM - 20
2 MPORT_IN_L
1 MPORT_DET
R1812
R1807
J0JYC0000656
J0JYC0000656
SA-MAX9000GN/PU MAIN (IO EXPANSION)
10 11 12
13 14
A
B
C
C
D
E
F
G
CIRCUIT
H
13 14