Rtc External Rtcrst Circuit; Power-Well Isolation Control Requirements; Figure 78. Rtcrst External Circuit For Ich2 Rtc - Intel 815EG Design Manual

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11.8.5

RTC External RTCRST Circuit

The ICH2 RTC requires some additional external circuitry. The RTCRST# signal is used to reset
the RTC well. The external capacitor and the external resistor between RTCRST# and the RTC
battery (Vbat) were selected to create an RC time delay, such that RTCRST# will go High some
time after the battery voltage is valid. The RC time delay should be within the range of 10–20 ms.
When RTCRST# is asserted, bit 2 (RTC_PWR_STS) in the GEN_PMCON_3 (General PM
Configuration 3) register is set to 1 and remains set until cleared by software. As a result, when the
system boots, the BIOS knows that the RTC battery has been removed.

Figure 78. RTCRST External Circuit for ICH2 RTC

This RTCRST# circuit is combined with the diode circuit (see Figure 78), which allows the RTC
well to be powered by the battery when system power is unavailable. Figure 78shows an example
of this circuitry when used in conjunction with the external diode circuit.
11.8.6

Power-Well Isolation Control Requirements

All RTC-well inputs (RSMRST#, RTCRST#, INTRUDER#) must be either pulled up to VCCRTC
or pulled down to ground while in G3 state. RTCRST# when configured as shown in Figure 78
meets this requirement. RSMRST# should have a weak external pull-down to ground and
INTRUDER# should have a weak external pull-up to VCCRTC. This will prevent these nodes
from floating in G3, and correspondingly will prevent ICCRTC leakage that can cause excessive
coin-cell drain. The PWROK input signal should also be configured with an external weak pull-
down.
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Intel 815EG Chipset Platform Design Guide
VCC3_3SBY
Diode /
battery circuit
1 kΩ
8.2 kΩ
RTCRST
circuit
I/O Subsystem
Vcc RTC
1.0 µF
RTCRST#
2.2 µF
RTC_RTCRESET_ext_circ
129