Ac '97 Routing; Figure 68. Example Speaker Circuit - Intel 815EG Design Manual

Chipset platform for use with universal socket 370
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I/O Subsystem

Figure 68. Example Speaker Circuit

11.3.4

AC '97 Routing

To ensure the maximum performance of the codec, proper component placement and routing
techniques are required. These techniques include properly isolating the codec, associated audio
circuitry, analog power supplies, and analog ground planes, from the rest of the motherboard. This
includes plane splits and proper routing of signals not associated with the audio section. Contact
your vendor for device-specific recommendations.
The basic recommendations are as follows:
• Special consideration must be given for the ground return paths for the analog signals.
• Digital signals routed in the vicinity of the analog audio signals must not cross the power
plane split lines. Analog and digital signals should be located as far as possible from each
other.
• Partition the board with all analog components grouped together in one area and all digital
components in another.
• Separate analog and digital ground planes should be provided, with the digital components
over the digital ground plane, and the analog components, including the analog power
regulators, over the analog ground plane. The split between planes must be a minimum of
0.05 inches wide.
• Keep digital signal traces, especially the clock, as far as possible from the analog input and
voltage reference pins.
• Do not completely isolate the analog/audio ground plane from the rest of the board ground
plane. There should be a single point (0.25 inches to 0.5 inches wide) where the
analog/isolated ground plane connects to the main ground plane. The split between planes
must be a minimum of 0.05 inches wide.
• Any signals entering or leaving the analog area must cross the ground split in the area where
the analog ground is attached to the main motherboard ground. That is, no signal should cross
the split/gap between the ground planes, which would cause a ground loop, thereby greatly
increasing EMI emissions and degrading the analog and digital signal quality.
• Analog power and signal traces should be routed over the analog ground plane.
116
ICH2
3.3V
Integrated Pull-Up
18-42 K
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Disable Tim eout
Due To Speaker and
Feature.
Codec Circuit.
Reff > 50 K
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Intel
815EG Chipset Platform Design Guide
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