- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Phase Descriptions
Phase #26 -
Complete Synchronous Test (External Loop)
Phase Name:
Complete Synchronous Test (External Loop)
Type:
Interactive
Function:
This phase diagnoses Serial Communication Controller (SCC), the Direct
Memory Access Controller (DMAC), and balanced and unbalanced transceivers.
Also tests encoding/decoding modes, internal/external clocking, and clock
recovery using DPLL.
Tests:
No tests run.
Time:
0 seconds
Warnings:
None
Notes:
This phase can only be run with special equipment that is only available only
at the factory.
It
requires a set of special cables and a specialloopback circuit
board.
Hardware Tested:
The SCC, DMAC, and the balanced and unbalanced drivers and receivers are
tested in this phase. Counter/Timer 3 is also tested with an external clock in
this phase.
GENERAL PURPOSE SYNCHRONOUS CONTROLLER
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