Introduction; Hardware Specifics - Xilinx MicroBlaze Spartan-3E 1600E Edition Getting Started

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MicroBlaze Development Kit
Reference System

Introduction

This reference system demonstrates µClinux running on the MicroBlaze™ soft processor
and was designed using the Embedded Development Kit (EDK).
An example basic µClinux kernel is provided that is tailored to the Spartan™-3E 1600E
Edition Development Kit board and this reference design.
The kernel and ROM file system are downloaded into the DDR memory and run
completely out of the external memory.
The methods for downloading and running the µClinux kernel demonstration are:
•
•
•
The µClinux kernel image is pre-loaded into the Intel StrataFlash on the board from the
factory.
Details for obtaining the FLASH code images and the procedure for how to re-program the
FLASH memory can be found on the following Spartan-3E Web page link:
http://www.xilinx.com/sp3e1600e

Hardware Specifics

This reference system targets the Spartan-3E 1600E Edition development board. The
system uses the MicroBlaze processor with cache turned on for both the instruction cache
(I-cache) and the data cache (D-cache). As shown in
MCH OPB DDR memory controller, the OPB Ethernet MAC, the OPB EMC memory
controller, and the OPB UART Lite IP cores. An OPB Timer and OPB Interrupt controller
are also needed for the µClinux kernel.
See
Getting Started with the MicroBlaze Development Kit - Spartan3E 1600E Edition
UG258 (v1.0) June 29, 2006
By powering up from the Intel StrataFlash PROM with the FPGA configuration mode
pins set to BPI-up mode
By depressing the PROG button on the board with the FPGA configuration mode pins
set to BPI-up mode, thereby invoking download from the Intel StrataFlash PROM
By using a debugger, such as XMD (provided as part of the EDK tools), and
downloading the image file directly into DDR, through the MicroBlaze Debug
Module
Table 2-1 for the address map of the system.
www.xilinx.com
Chapter 2
µ
Clinux
Figure 2-1, the system also includes the
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