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AR-PB8
[9] CIRCUIT DIAGRAM
1. BLOCK DIAGRAM
PDATA[7:0]
PARACONN
G/A (2)
EEPROM
SYSAD[31:0]
Boot ROM
RAD[21:0]
2MB
RCS0_
SYSAD[31:0]
RAD[21:0]
Code ROM 0
RCS1_
2MB
SYSAD[31:0]
Code ROM 1
RAD[21:0]
RCS2_
DIMM72
Optional
(AR-PS1)
LDT[15:0]
NETWORKCONN
D9001MFH
81.2376MHz
SCLK
MODECLK
MODEIN
SYSAD[15:0]
RAD[5:2]
RCS_[3:0]
PIACS0_
PIACS1_
PIACS2_
SYSAD[15:0]
RAD2
VFCLK
MASTERCLK
CPU
MODEIN
NR4650
(Internal 133MHz)
SYSAD[31:0]
SYSAD[53:33]
MASTERCLK
SCLK
MD[63:0]
MA[11:0]
G/A (1)
RAS0 CAS[7:0]
MBRAS1 MBRAS2
VFCLK
9 – 1
14.318MHz
22.22MHz
44.44MHz
CY2292
14.318MHz
RAM
8MB
RAS0
CAS[7:0]
RAM
DIMM168 64MB Max
MBRAS1
CAS[7:0]
RAM
MBRAS2
DIMM168 64MB Max
CAS[7:0]
Digital copier I/F
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