Samsung SCX-1100 Service Manual page 61

CIRCUIT DESCRIPTION
3-3.DETAILED DESCRIPTION
3-3-1 BLOCK DIAGRAM and MAIN CONTROLLER description
3-3-1-1 GENERAL DESCRIPTION
MAIN CONTROLLER(S3C46MOX(Jupiter3),U15) consists of this system consists of CPU(ARM7TDMI RISC PROCES-
SOR), 8K BYTES CACHE, DATA and ADDRESS BUS, PLL deriding input frequency and CLOCK CONTROL part,
SERIAL COMMUNICATION part supporting UART, PRINT HEAD control part, PARALLEL PORT INTERFACE part,
USB INTERFACE part, External DMA part for receiving data from external COLOR IMAGE PROCESSOR(OA-
980,U21), MEMORY and EXTERNAL BANK control part, SYNCHRONOUS SERIAL INTERFACE control part for inter-
facing Thunderbolt, and LF/CR Motor drive control and general purpose I/O control parts.(See Figure 2 )
3-3-2 S3C46MOX(Jupiter3) FUNCTION DESCRIPTION
3-3-2-1 SYSTEM CLOCK
There are two ways of Clock input method. One is the method to make Master Clock(MCLK) at the internal PLL by con-
necting X-tal and Capacitor to the outside, and another method is to use MCLK(When inputting 40MHz) directly, which
supplies maximum 40MHz Clock to the EXTCLK terminal(PIN65). The range of frequency being input in case of using
X-tal is limited to 4MHz~10MHz. This system uses SSCG(FS781) with a 10MHZ X-tal outside to make MCLK, and sup-
plies Clock to the XIN terminal(PIN67) of ASIC by expanding Spectrum with bandwidth about 1.5% in comparison with
the basic frequency by using this IC. Inside the ASIC, the PLL makes 66MHz MCLK signal, which is the basic operation
frequency of the System. Also, this PLL makes 48MHz, the operation frequency of USB Controller.
3-3-2-2 DATA AND ADDRESS BUS CONTROL
1. /RD & /WR
/RD & /WR SIGNAL are synchronized with the inside MCLK(66MHZ) and becomes active to Low.
These signal are Strobe Signal used to Read or Write data when each Chip Select becomes active connected to
/RD,/WR PIN of RAM, ROM, OA-980.
2. CHIP SELECT (/ROMCS, /IP_CS,/MED_CS,/SCS0,/SCS1)
- /ROMCS : FLASH MEMORY(U7) CHIP SELECT (LOW ACTIVE)
- /IP_CS : OA-980(U21) CHIP SELECT
(LOW ACTIVE)
- /SCS1 : SDRAM(OPTION)(U12) CHIP SELECT (LOW ACTIVE)
In case each Chip Select is low, it may Read or Write data.
3. D0 ~ D15
- 16BIT DATA BUS
4. A0 ~ A24
- ADDRESS BUS (A23 ~ A24 RESERVED)
Repair Manual
3-2
Samsung Electronics
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