Data Buffers - Panasonic MN103S User Manual

14.2.5

Data Buffers

A/D conversion result (10 bits) is stored in A/D conversion data buffers.
A/D0 Conversion Data Buffer 0 (AN0BUF00: 0x0000A410) [16-bit Access Register]
bp 15 14
Flag
- -
At reset 0 0
Access R R
bp Flag Description
15-10 - -
AN0BUF09 A/D0 conversion result of ADIN00 pin
9-0 to
AN0BUF00
A/D0 Conversion Data Buffer 1 (AN0BUF01: 0x0000A414) [16-bit Access Register]
bp 15 14
Flag
- -
At reset 0 0
Access R R
bp Flag Description
15-10 - -
AN0BUF19 A/D0 conversion result of ADIN01 pin
9-0 to
AN0BUF10
A/D0 Conversion Data Buffer 2 (AN0BUF02: 0x0000A418) [16-bit Access Register]
bp 15 14
Flag
- -
At reset 0 0
Access R R
bp Flag Description
15-10 - -
AN0BUF29 A/D0 conversion result of ADIN02 pin
9-0 to
AN0BUF20
13 12 11 10
AN0
- - - - BUF
0 0 0 0
R R R R
13 12 11 10
AN0
- - - - BUF
0 0 0 0
R R R R
13 12 11 10
AN0
- - - - BUF
0 0 0 0
R R R R
9 8 7 6
AN0 AN0 AN0 AN0
BUF BUF BUF BUF
09 08 07 06
× × × ×
R R R R
Setting condition
-
A/D0 conversion result of ADIN00 pin
9 8 7 6
AN0 AN0 AN0 AN0
BUF BUF BUF BUF
19 18 17 16
× × × ×
R R R R
Setting condition
-
A/D0 conversion result of ADIN01 pin
9 8 7 6
AN0 AN0 AN0 AN0
BUF BUF BUF BUF
29 28 27 26
× × × ×
R R R R
Setting condition
-
A/D0 conversion result of ADIN02 pin
5 4 3 2
AN0 AN0 AN0 AN0
BUF BUF BUF BUF
05 04 03 02
× × × ×
R R R R
5 4 3 2
AN0 AN0 AN0 AN0
BUF BUF BUF BUF
15 14 13 12
× × × ×
R R R R
5 4 3 2
AN0 AN0 AN0 AN0
BUF BUF BUF BUF
25 24 23 22
× × × ×
R R R R
Control Registers
Chapter 14
A/D Converter
1 0
AN0
BUF
01 00
× ×
R R
1 0
AN0
BUF
11 10
× ×
R R
1 0
AN0
BUF
21 20
× ×
R R
XIV - 17