Dead Time Setting Registers - Panasonic MN103S User Manual

Chapter 10
Motor Control PWM
10.2.7

Dead Time Setting Registers

Dead Time setting register is used to set dead time of PWM0 and PWM1. Dead Time is designed to insert on time
delay into each of the upper and lower phases when the signal is inverted at PWM output. The dead time counter
functions in synchronization with clock set by the PWM mode control register 'PWMMDn) and counts 1 every 2
clock cycles. The dead time or delay time is calculated with "setting × 2 + 1". Thus, when "00" is set, 1 clock
cycle of dead time is inserted if dead time is enabled. This register needs to be set only when double-buffer mode
is selected. The value of DTMSETn is loaded into the register at the timing selected with the PWM mode control
register (PWMMDn). When the PWM counter is not running, the double-buffer value is loaded into the register as
is regardless of the specified read timing.
PWM0 Dead Time Setting Register (DTMSET0: 0x0000A31C) [8,16-bit Access Register]
bp 15
Flag
-
At reset -
Access R
bp Flag
15-8 -
DTST07
7-0 to
DTST00
PWM1 Dead Time Setting Register (DTMSET1: 0x0000A34C) [8,16-bit Access Register]
bp 15
Flag
-
At reset -
Access R
bp Flag
15-8 -
DTST17
7-0 to
DTST10
X - 14 Control Registers
14 13 12 11
- - - -
- - - -
R R R R
Description
-
Setting PWM0 dead time
14 13 12 11
- - - -
- - - -
R R R R
Description
-
Setting PWM1 dead time
10 9 8 7
DTS DTS
- - -
T07 T06
- - - 0
R R R R/W R/W
Setting condition
-
Setting dead time value to 8-bit dead timer counter
10 9 8 7
DTS DTS
- - -
T17 T16
- - - 0
R R R R/W R/W
Setting condition
-
Setting dead time value to 8-bit dead timer counter
6 5 4 3
DTS DTS DTS DTS
T05 T04 T03 T02
0 0 0 0
R/W R/W R/W R/W
6 5 4 3
DTS DTS DTS DTS
T15 T14 T13 T12
0 0 0 0
R/W R/W R/W R/W
2 1 0
DTS DTS
T01 T00
0 0 0
R/W R/W
2 1 0
DTS DTS
T11 T10
0 0 0
R/W R/W