List Of Abbreviations - Philips SACD 1000/001 Service Manual

GB 152 9. SACD 1000

9.27 List of abbreviations

+12VSTBY
+3A
+3V3
+3V3S
+5V
+5VA
+5VB
+5VC
+5VSTBY
+5VX
+6VSTBY
+9V
0_6_12V
1.5V
2.0V
2.5V
27M_CLK
384FS_IN
75HZ_PULSE
-8VSTBY
A[20:1]
A1_MACE
AD[11:0]
ALE
ALPHA0
AM[7:0]
AM[17:8]
AMD[7:0]
Ax
B
B_BCLK
B_DATA
B_FLAG
B_OUT
B_SYNC
B_V4
B_VID
B_WCLK
BE1N_FUR
BE0N_FUR
C
C_OUT
C_VID
Circuit-, IC descriptions and list of abbreviations
+12V power supply present during
standby
Filtered 3V3 power supply to
IC7207(MACE servo processor)
3V3 power supply
Stabilised 3V3 power supply from
IC7605 to MACE (IC7207) circuit
+5V power supply
Filtered +5V: analog power supply
for IC7311(HD61 decoder)
Filtered +5V: digital power supply for
IC7311(HD61 decoder)
+5V power supply for IC7202(servo
flash eprom)
+5V power supply present during
standby
+5V power supply for
IC7105(opamp)
+6V power supply present during
standby
Stabilised +9V power supply from
IC7109 to IC7103 (Servo power
driver)
Scart switch control signal to A/V
board. 0V : loop through (AUX to
TV), 6V : play 16:9 format, 12V : play
4:3 format
1.5V reference voltage for IC7102
(DVDALAS)
2V reference voltage for IC7102
(DVDALAS)
2.5V reference voltage for IC7102
(DVDALAS)
27MHz clock out of the PLL-Master
clock for the main processor
(IC7503)
SACD clock from DAC PCB
75Hz pulse to audio interface
indication output
-8V power supply present during
standby
System address bus (EMI)
Amplitude of the "land" reflection
relative to the average EFM
SDRAM address bus
Address latch enable (servo
processor)
Generic name for the setpoint of the
laser power absorption control
Latched low address bus to servo
flash
High address bus to servo flash
Multiplexed address data bus to
servo flash
Central photodiode signal
Central photodiode signal
Basic engine I2S bit clock
Basic engine I2S data
Basic engine error flag
Video output blue from Sti5505
Basic engine sector /abs time sync
Basic engine versatile input pin
Buffered video output Blue to A/V
board
Basic engine I2S word clock
Upper byte enable of the Furore
Lower byte enable of the Furore
Central photodiode signal
Chrominance output from Sti5505
Buffered Chrominance output to A/V
board
CALF_MACE Central aperture low frequency
control signal to MACE
CAS[1:0]ND DRAM column address strobe
CASN SDRAM column address strobe
CE_ROM1N Chip enable flash eprom IC7401
CE_ROM2N Chip enable flash eprom IC7451
CE_ROMN Chip enable ROM memory (flash
access)
CENTRE_ON Control signal from Sti5505 to AV
board to switch STEREO OUTPUT
cinch to mono.
CFLG Correction flag output
CFR Control processor ready to accept
data (S2B)
CLK Clock for SDRAM memory
COSPH Position Control Sledge in
CPUANALYSE Control port P3 I/O from Sti5505
CPURESET Control port P3 I/O to Sti5505
CSH_FUR FURORE chip select the upper bank
CSI Chip select input of HD61 (servo)
CSL_FUR FURORE chip select the lower bank
CSN[2:1] SDRAM chip select
CTS_SER Clear to send control signal of
service serial interface
CVBS Buffered composite video output to
A/V board
CVBS_OUT Composite video output from
Sti5505
D Central photodiode signal
D[15:0] System data bus (EMI)
DO_GRAB Active data out of LLD (LossLess
Decoder). Indication output
DQ[15:0] SDRAM data bus
DQML SDRAM data mask enable (Lower)
DQMU SDRAM data mask enable (Upper)
DSD Direct Stream Digital
DSD_CLK DSD clock for DSD stereo signal
DSD_PCM[8:0] DSD data
DSD_STR[1:0] DSD stereo or downmix on DSD
DST Direct Stream Transfer
DVD_LDN Control signal from MACE to loader
supply IC7107
E Satellite photodiode signal
EMI_IRQN Interrupt request, active low
ERROROUT Control port P3 I/O from Sti5505
F Satellite photodiode signal
FADE_BUSY Indication that fade in/out is busy
FLASH_OEN FLASH output enable control signal
FO Focus actuator output
FOC- Focus actuator negative connection
FOC+ Focus actuator positive connection
FUR_AD[13:0] FURORE SDRAM address bus
FUR_CASN Furore SDRAM column address
strobe
FUR_CKE Furore SDRAM clock enable
FUR_CLK Furore SDRAM clock
FUR_DQ[15:0] FURORE SDRAM data bus
FUR_DQMH FURORE SDRAM data mask
enable (Upper)
FUR_DQML FURORE SDRAM data mask
enable (Lower)
FUR_RASN Furore SDRAM row address strobe
FUR_TDI Boundary scan test data input
FURORE
FUR_TMS Boundary scan test mode select
FURORE
FUR_TRST Boundary scan test port reset
FURORE
FUR_WEN Furore SDRAM write enable
G_OUT Video output green from Sti5505
G_VID Buffered video output Green to A/V
board
GND Ground
GP_IN_PIN[3:0] Furore general purpose input port
GP_OUT_PIN[3:0] Furore general purpose output port