Chipset Configuration; North Bridge; Iio Configuration - Supermicro SUPERSERVER User Manual

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UPER ERVER 7048R-C1RT/7048R-C1R User's Manual
Long Pwr (Power) Limit Ovrd (Override)
Select Enable to support long-term power limit override. If this feature is disabled,
BIOS will set the default value. The options are Enable and Disable.
Long Dur (Duration) Power Limit
This item displays the power limit set by the user during which long duration
power is maintained. The default setting is 0.
Long Dur (Duration) Time Window
Use this item to set the time window value (in seconds) over which the TDP
(Thermal Design Point) should be maintained. The default setting is 1, which will
allow the value to be automatically programed by the system.
Pkg (Package) Clmp (Clamping) Limit1
Use this item to set the limit on power performance states for the runtime proces-
sor, with P0 being the state with the highest frequency (clock speed) and power
(consumption), and P1, a step lower in performance than P0, with its frequency
and voltage scaled back a notch. The options are Between P1/P0 and Below P1.
Short Dur (Duration) Pwr (Power) Limit En (Enable)
Select Enable to support Short Duration Power Limit (Power Limit 2). The options
are Enable and Disable.
Short Dur (Duration) Pwr (Power) Limit
This item displays the time period during which short duration power is main-
tained. The default setting is 0.
Pkg (Package) Clmp (Clamping) Lim2
Use this item to set the limit on power performance states for the processor
operating in turbo mode, with P0 being the state with the highest frequency
(clock speed) and power (consumption), and P1, a step lower in performance
than P0, with its frequency and voltage scaled back a notch. The options are
Between P1/P0 and Below P1.
DRAM RAPL (Running Average Power Limit) Configuration
DRAM RAPL (Running Average Power Limit) Baseline
Use this item to set the run-time power-limit baseline for DRAM modules. The
options are Disable, DRAM RAPL Mode 0, and DRAM RAPL Mode 1.
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Override BW_LIMIT_TF (BW_limit_tf )
This feature allows the user to turn off the "Override BW_Limit_TF (Time Frame)"
setting when the item--the "Running Average Power Limit for DRAM modules"
(DRAM RAPL) is set to Enabled so that the DRAM RAPL setting can work
properly. The default setting is 1.
DRAM RAPL (Running Average Power Limit) Extended Range
Select Enable to extend the RAPL range for the DRAM modules. The options
are Disable and Enable.
Chipset Configuration
Warning! Please set the correct settings for the items below. A wrong configuration
setting may cause the system to become malfunction.
North Bridge
This feature allows the user to configure the settings for the Intel North Bridge.
IIO Configuration
EV DFX (Device Function On-Hide) Features
When this feature is set to Enable, the EV_DFX Lock Bits that are located on a
processor will always remain clear during electric tuning. The options are Dis-
able and Enable.
IIO0 Configuration
IOU2 (II0 PCIe Port 1)
This item configures the PCI-E port Bifuraction setting for a PCI-E port specified
by the user. The options are x4x4, x8, and Auto.
IOU0 (II0 PCIe Port 2)
This item configures the PCI-E port Bifuraction setting for a PCI-E port specified
by the user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.
IOU1 (II01 PCIe Port 3)
This item configures the PCI-E port Bifuraction setting for a PCI-E port specified
by the user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto..
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Chapter 7: BIOS