Figure 94. Block Diagram For Atm Ingress (Atm -> Packet) Direction - Alcatel-Lucent 9500 MPR User Manual

Figure 94. Block diagram for ATM Ingress (ATM -> Packet) direction
[1] ATM Ingress Policing
• ATM Policing (cell-based) can be enabled/disabled, on provisioning base, for each VP/VC con-
figured on ATM interface, according to its Ingress Traffic Descriptor (PCR,SCR,CDVT,MCDR)
as defined by ATM Traffic Management AF-TM-0121.000
– Service Category: CBR, UBR+ and UBR
– Conformace Definition: CBR.1
[2] Cells to packet
The ATM cells are encapsulated in PWE3 packet.
[3] Packet Profiled Scheduling
• ATM cell(s) are put into a packet, as result of provisioned value of max concat. number or
elapsed timeout; an Ethernet flow is therefore created (identified by ATM PW Label/VLAN pair),
whose CoS and CIR/PIR are automatically assigned by MPR based on ATM Ingress Traffic
Descriptor and previous encaps params.
• This packet is then put in a dedicated queue where:
– it is scheduled for transmission towards Core switch, with a constant rate given by
assigned CIR/PIR (depending on CoS):
• if the actual flow rate is < CIR:
–
–
• if the actual flow rate is > PIR, congestion on this queue happens and the next PWE3
packets will be dropped directly in ASAP card.
In/out profile is a dynamic assignment, based on CIR/PIR conformance for packet queue, and FC
type (expedited vs best effort). The mapping of the 802.1p bits is shown in Table 31.
It is mapped to 802.1p bits in the following manner:
9500 MPR Rel. 3.1
184/980 3DB18809AAAA Issue 1
802.1p bits are marked as "GREEN", if CIR<actual flow rate<PIR,
802.1p bits are marked as "YELLOW", (the packet is descarded on the Modem
unit in case of congestion on radio i/f);
User Manual
Product information and planning