Agilent Technologies 54621A User Manual page 253

* Denotes Warranted Specifications, all others are typical. Specifications are valid after a 30-minute warm-up period and
±10 ° C from firmware calibration temperature.
Vertical System: Analog Channels (continued)
ESD Tolerance
Noise Peak-to-Peak
Common Mode Rejection Ratio
DC Vertical Gain Accuracy*
DC Vertical Offset Accuracy
1
Single Cursor Accuracy
1
Dual Cursor Accuracy*
1
2 mV/div is a magnification of 4 mV/div setting. For vertical accuracy calculations, use full scale of 32 mV for 1 mV/div sensitivity setting.
Vertical System: Digital Channels (54641D and 54642D only)
Number of Channels
Threshold Groupings
Threshold Selections
User-Defined Threshold Range
Maximum Input
Voltage
Threshold Accuracy*
Input Dynamic Range
Minimum Input Voltage Swing
Input Capacitance
Input Resistance
Channel-to-Channel Skew
±2 kV
3% full scale or 3 mV, whichever is greater
20 dB @ 50 MHz
1
±2.0% full scale
≤
200 mV/div: ±0.1 div ±2.0 mV ±0.5% offset
>
200 mV/div: ±0.1 div ±2.0 mV ±1.5% offset value
±{DC Vertical Gain Accuracy + DC Vertical Offset
Accuracy + 0.2% full scale (~1/2 LSB) }
Example: For 50 mV signal, scope set to 10 mV/div (80 mV full scale), 5 mV offset,
accuracy = ±{2.0%(80mV) + 0.1 (10 mV) + 2.0 mV + 0.5% (5 mV) + 0.2%(80 mV)} = ±4.78 mV
±{DC Vertical Gain Accuracy + 0.4% full scale (~1 LSB)}
Example: For 50 mV signal, scope set to 10 mV/div (80 mV full scale), 5 mV offset,
accuracy = ±{2.0%(80 mV) + 0.4%(80 mV)} = ±1.92 mV
16 Digital – labeled D15 – D0
Pod 1: D7 – D0
Pod 2: D15 – D8
TTL, CMOS, ECL, user-definable (selectable by pod)
±8.0 V in 10 mV increments
±40 V peak CAT I
±(100 mV + 3% of threshold setting)
±10 V about threshold
500 mV peak-to-peak
~ 8 pF
Ω
100 k ±2% at probe tip
2 ns typical, 3 ns maximum
Performance Characteristics
Agilent 54640-series Performance Characteristics
7-15