ECS RD480-A939 User Manual page 42

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LDT Configuration (Enabled)
This item enables or disables the LDT configuration.
Upstream LDT Bus Width (16 bit)
This item allows users to manually adjust the upstream LDT bus width to be 8 bit or 16
bit.
Downstream LDT Bus Width (16 bit)
This item allows users to manually adjust the downstream LDT bus width to be 8 bit or
16 bit.
LDT Bus Frequency (Auto)
This item allows users to manually adjust the LDT Bus Frequency.
PCIE Reset Delay (Disabled)
This item enables or disables the PCIE reset delay.
Press <Esc> to return to the Advanced Chipset Features page.
PCIE GFX Core Payload Size (64 Bytes)
This item allows users to manually adjust the PCIE GFX Core Payload Size.
PCIE GPP Core Payload Size (64 Bytes)
This item allows users to manually adjust the PCIE GPP Core Payload Size.
Dual Slot Configuration (Disabled)
This item allows users to enable or disable the Dual Slot Configuration.
GFX0/1 Link Width (x16/x8)
This item allows users to manually set the GFX Link Width.
GFX Multi Function Mode (Disabled)
This item allows users to enable or disable the GFX Multi Function Mode.
AGP Aperture Size (128MB)
This item allows users to manually adjust the AGP aperture size, from 32MB to 2GB.
GFX Clock Mode (Sync)
This item allows users to set the GFX Clock Mode to be Sync or Async. When this item
is set to Sync, the following 3 item is activated
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Dual-Mode Interleaving (Disabled)
This item allows users to enable or disable the Dual-Mode interleaving function.
Dynamic CKE (Enabled)
This item allows users to enable or disable the Dynamic CKE function.
System BIOS Cacheable (Disabled)
This feature is only valid when the system BIOS is shadowed. It enables or disables the
caching of the system BIOS ROM at F0000h-FFFFFh via the L2 cache. This greatly
speeds up accesses to the system BIOS.
Async GFX Clock (200MHz]): This item allows users to manually adjust the
GFX clock, from 200MHz to 350MHz.
Async GFX Clock Source (14.318MHz OSC):This item allows users
to set the GFX Clock Source, either to be 14.318MHz OSC or 100MHz
PCIE.
MCLK Spread Spectrum (Disabled): This item allows users to enable
or disable the MCLK spread spectrum function.
Using BIOS