Samsung SCL700 Service Manual page 26

NO-OSD-DISPLAY
ADDR MODEL/DATA
NTSC PAL
HI8 NOR HI8 NOR
0F5 FF - - -
0F6 FF - - -
0F7 41 41 41 41
0F8 01 - - -
0F9 F6 F4 F2 F2
0FA 02 - - -
0FB 77 77 8E 8E
0FC 03 - - -
0FD C9 C9 B0 B0
0FE 02 - - -
0FF 60 - D0 D0
100 ~ 116
117 02 01 02 01
117 ~ 11F
120 04 03 01 03
121 00 03 08 08
122 01 0E 00 0F
123 ~ 1A4
1A5 ~ 1FE
1FF ~ 227
228 ~ 24B
228 02 - - -
229 60 60 60 60
22A 01 - 0B -
22B 04 - - -
22C 0F - - -
22D 01 01 01 01
22E 0F - - -
22F 1C 18 18 18
230 01 - 01 -
231 00 - - -
232 15 - - -
233 04 - - -
234 06 - - -
235 01 01 01 01
236 0B - - -
237 16 14 12 12
238 00 - - -
239 13 - - -
23A 3F - - -
23B 05 - - -
23C 0F 0D 0F 0F
23D 00 - - -
23E 08 - - -
23F 32 34 37 32
240 09 - - -
241 01 - - -
242 BB - C4 C0
243 00 - - -
244 10 - 12 -
245 00 - - -
246 00 - - -
Samsung Electronics
D7 D6 D5
;
;
; VSTOP OFFSET AD D/ZOOM
; Dis_Oaehs_Wa_Gizz: CCD WHITE DEFECT COMPENSATION H STSRT
; Dis_Oaehe_Wa_Gizz: CCD WHITE DEFECT COMPENSATION H END
; Dis_OaeVs_Wa_Gizz: CCD WHITE DEFECT COMPENSATION V STSRT
; Dis_OaeVe_Wa_Gizz: CCD WHITE DEFECT COMPENSATION V END
; SEPIA R #26C
; #26D
; SEPIA B #26E
; #26F
TOP INITIALIED DATA: FIXED
;E_SP2ADCK LOWER 4BIT (ADCK PHASE SELECT )
TG-INITIALIZED DATA: FIXED
; E_DLRG (RG PHASE DELAY )
; E_DLSP1(SHP PHASE DELAY )
; E_DLSP2(SHD PHASE DELAY )
TG-INITIALIZED DATA= FIXED
LD/CB BLOCK INITIALIZED DATA= FIXED
KZ(WHITE DEFECT COMPENSATION) BLOCK INITIALIZED DATA FIXED
Y PROCESS BLOCK
; D RANGE VARIABLE COEFF.(H) :256STANDARD:03 FF TYP.=X2, 512STANDARD:02 00 TYP.X1
; D RANGE VARIABLE COEFF.(L)
; H_BPF_MAIN_G_MODE(4bit/1bit)(H ENHANCER BPF COEFF.-MSB D4=0:+,1:-)
; H ENHANCER CORE LEVEL(0.5LCB)
; H_YOKUATU(H ENHANCER SUPPRESS LEVEL: 5LSB)
; H ENHANCER NOISE COEFF.(0~8TIMES)
; H ENHANCER HIGH LEVEL COEFF.(0~8TIMES)
; H ENHANCER COEFF.(0~8TIMES)
; H_BPF_MAIN_G_MODE(4bit/1bit)
; TEST MODE
; VENH_LMT (V ENHANCER INPUT LIMIT LEVEL)
; HIGH- V ENHANCER CORE LEVEL(0.5LSB)
; KV_YOKUATU (HIGH- V ENHANCER SUPPRESS LEVEL)
;HIGH- V ENHANCER NOISE COEFF.(0~8 TIMES)
;HIGH- V ENHANCER HIGH LEVEL COEFF.(0~8 TIMES)
;HIGH- V ENHANCER COEFF.(0~8 TIMES)
;TEST MODE
;"HENH_HL (HIGH LIGHT H ENHANCER COEFF.);100IRE OVER , H ENHANCER
;GM_IN_LMT (GAMMA INPUT LIMIT); 100IRE = 10HEX
;GM_KNEE (GAMMA KNEE COEFF.); 100IRE OVER, GAMMA CURVE
;Y_GAMMA (GAMMA COEFF.) ; 0~100IRE GAMMA CURVE
;GM_BC (GAMMA BLACK CLIP COEFF.)
;HLENH_CR (HILIGHT ENHANCER CORE LEVEL)
;GAMMA ,BEFORE, SETUP ADJUST"
;Y M_F PEDESTAL LEVEL CHANGE ;OFFSET BINARY CODE (NTSC TPY:0E HEX)
;Y M_F PEDESTAL LEVEL CHANGE; 1=ADD, 0=SUB.
;FADE_LEV (FADE LEVEL) ;BLACK FADE TYP=C0 hex
;Y_WB NEGA = '1' , POSI='0'
;HLENH_LM (HILIGHT ENHANCER LIMIT LEVEL)
; TEST MODE
;NEGA/POSI
DISTANCE
CONTENT
D4 D3 D2
Alignment and Adjustment
D1 D0
4-9