Sony HBD-E770W Service Manual page 86

HBD-E770W
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Pin No. Pin Name
AR41 B_RDQS1B
AR43 B_RDQS1
AT2 XI_RTC
AT4 XO_RTC
AT6 AVSS12_ADC
AT10 FE_GIO13
AT12 SCL
AT14 DVSS
AT16 A_RDQ5
AT18 A_RDQM0
AT20 A_RDQ11
AT22 DVSS
AT24 A_RA11
AT26 A_RA1
AT28 A_RBA2
AT30 A_RVREF
AT32 A_RDQ23
AT34 DVSS
AT36 DVSS
AT38 B_RDQ5
AT40 B_RDQS0
AT42 B_RDQS0B
AU1 AVDD33_RTC
AU3 AVSS33_RTC
AU5 AVDD33_SACD
AU7 AVDD33_ST
AU9 AVSS12_ST2
TE
L 13942296513
AU11 EEPWRQ
AU13 VCC3IO_1
AU15 A_RDQ3
AU17 DVSS
AU19 A_RDQ9
AU21 DVSS
AU23 A_RCASB
AU25 DVSS
AU27 A_RBA1
AU29 DVSS
AU31 A_RDQ21
AU33 DVSS
AU35 A_RDQM3
AU37 A_RDQ27
AU39 DVSS
AU41 B_RDQ3
AU43 B_RDQ2
AV2 FE_JRTCLK
AV4 AVSS33_SACD
AV6 AVDD12_SRX1
AV8 AVSS12_ST1
AV10 AVDD12_ST
AV12 GPIO6
AV14 SDA
AV16 A_RDQ0
AV18 A_RDQM1
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AV20 A_RDQ14
AV22 A_RA13
AV24 A_RCSB
.
AV26 A_RA2
AV28 A_RA5
AV30 NC
86
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I/O
O Data strobe signal (negative) output to the SD-RAM
O Data strobe signal (positive) output to the SD-RAM
I Not used
O Not used
- Ground terminal
- Not used
I/O Two-way clock bus with the EEPROM
- Ground terminal
I/O Two-way data bus with the SD-RAM
O Data mask signal output to the SD-RAM
I/O Two-way data bus with the SD-RAM
- Ground terminal
O Address signal output to the SD-RAM
O Address signal output to the SD-RAM
O Bank address signal output to the SD-RAM
I Reference voltage (+0.9V) input terminal for the SD-RAM
I/O Two-way data bus with the SD-RAM
- Ground terminal
- Ground terminal
I/O Two-way data bus with the SD-RAM
O Data strobe signal (positive) output to the SD-RAM
O Data strobe signal (negative) output to the SD-RAM
- Power supply terminal (+3.3V)
- Ground terminal
- Power supply terminal (+3.3V)
- Power supply terminal (+3.3V)
- Ground terminal
- Not used
- Power supply terminal (+3.3V)
I/O Two-way data bus with the SD-RAM
- Ground terminal
I/O Two-way data bus with the SD-RAM
- Ground terminal
O Column address strobe signal output to the SD-RAM
- Ground terminal
O Bank address signal output to the SD-RAM
- Ground terminal
I/O Two-way data bus with the SD-RAM
- Ground terminal
O Data mask signal output to the SD-RAM
I/O Two-way data bus with the SD-RAM
- Ground terminal
I/O Two-way data bus with the SD-RAM
I/O Two-way data bus with the SD-RAM
- Not used
- Ground terminal
- Power supply terminal (+1.2V)
- Ground terminal
- Power supply terminal (+1.2V)
O UPG status signal output to the system controller
I/O Two-way data bus with the EEPROM
I/O Two-way data bus with the SD-RAM
O Data mask signal output to the SD-RAM
I/O Two-way data bus with the SD-RAM
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O Address signal output to the SD-RAM
y
O Chip select signal output to the SD-RAM
i
O Address signal output to the SD-RAM
O Address signal output to the SD-RAM
- Not used
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Description
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