Sony HBD-E770W Service Manual page 85

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Pin No. Pin Name
AK26
AK28
AK30
AK32
AK36
AK38
AK40
AK42
AL1 USB_DP0
AL3 USB_DM1
AL5 AVSS33_USB
AL7 FE_SVDD33
AL21
AL23
AL25
AL27
AL29
AL31
AL35
AL37 B_RDQ11
AL39 B_RDQ14
AL41 B_RCLK0B
AL43 B_RCLK0
AM2 USB_DP1
AM4 USB_VRT
AM6 FE_SXVDD33
AM8
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L 13942296513
AM36 B_RDQM1
AM38 B_RDQ12
AM40 B_RDQ10
AM42 B_RDQ13
AN1 FE_STXP
AN3 AVDD33_USB
AN5 FE_SAGND
AN7 FE_SPLLVDD12
AN35
AN37
AN39
AN41 B_RDQ15
AN43
AP2 FE_STXN
AP4 CORE_RESETB
AP6 FE_STXVDD12
AP8 FE_AVDD12_RX
AP36
AP38 B_RDQM0
AP40
AP42
AR1 FE_SRXP
AR3 FE_SRXN
AR5 RTCRBIAS
AR7 AVDD12_ADC
AR17
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AR19
AR25
AR29
.
AR31
AR37
AR39
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I/O
DVSS - Ground terminal
DVSS - Ground terminal
DVSS - Ground terminal
VCCK - Power supply terminal (+1.1V)
B_RDQ9 I/O Two-way data bus with the SD-RAM
B_RA13 O Address signal output to the SD-RAM
VCC2IO - Power supply terminal (+1.8V)
VCC2IO - Power supply terminal (+1.8V)
I/O USB differential serial data (positive) input/output with the USB connector (rear side)
I/O USB differential serial data (negative) input/output with the USB connector (front side)
- Ground terminal
- Power supply terminal (+3.3V)
VCCK - Power supply terminal (+1.1V)
VCCK - Power supply terminal (+1.1V)
VCCK - Power supply terminal (+1.1V)
VCCK - Power supply terminal (+1.1V)
VCCK - Power supply terminal (+1.1V)
VCCK - Power supply terminal (+1.1V)
VCC2IO - Power supply terminal (+1.8V)
I/O Two-way data bus with the SD-RAM
I/O Two-way data bus with the SD-RAM
O Clock signal (negative) output to the SD-RAM
O Clock signal (positive) output to the SD-RAM
I/O USB differential serial data (positive) input/output with the USB connector (front side)
- Not used
- Power supply terminal (+3.3V)
FE_TLO O Motor drive signal output to the motor driver IC
O Data mask signal output to the SD-RAM
I/O Two-way data bus with the SD-RAM
I/O Two-way data bus with the SD-RAM
I/O Two-way data bus with the SD-RAM
O SATA channel 1 RX differential pair signal (positive) output terminal
- Power supply terminal (+3.3V)
- Ground terminal
- Power supply terminal (+1.2V)
DVSS - Ground terminal
DVSS - Ground terminal
DVSS - Ground terminal
I/O Two-way data bus with the SD-RAM
B_RDQ8 I/O Two-way data bus with the SD-RAM
O SATA channel 1 RX differential pair signal (negative) output terminal
I System reset signal input from the system controller
- Power supply terminal (+1.2V)
- Power supply terminal (+1.2V)
B_RDQ7 I/O Two-way data bus with the SD-RAM
O Data mask signal output to the SD-RAM
VCC2IO - Power supply terminal (+1.8V)
VCC2IO - Power supply terminal (+1.8V)
I SATA channel 1 TX differential pair signal (positive) input terminal
I SATA channel 1 TX differential pair signal (negative) input terminal
- Not used
- Power supply terminal (+1.2V)
DVSS - Ground terminal
VCC2IO - Power supply terminal (+1.8V)
x ao
DVSS - Ground terminal
y
DVSS - Ground terminal
i
VCC2IO - Power supply terminal (+1.8V)
B_RDQ6 I/O Two-way data bus with the SD-RAM
B_RDQ0 I/O Two-way data bus with the SD-RAM
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