Sony HBD-E770W Service Manual page 77

Blu-ray disc/dvd receiver
Hide thumbs Also See for HBD-E770W:
Table of Contents

Advertisement

QQ
3 7 63 1515 0
• IC Pin Function Description
MB-134 BOARD IC101 CXD9983GG (BD DECODER)
Pin No.
Pin Name
A1
A3
A5
A7
A9
VOUTD12
A11
A13
A15
A17
A19
A21
A23
AVDD12_27MPLL
A25
NS_XTALI
A27
A29
A31
DACOUT4
A33
DACOUT1
A35
A37
A39
A41
A43
ETRXCLK
B2
B4
TE
L 13942296513
B6
B8
VOUTD10
B10
VOUTD14
B12
B14
B16
VINHSYNC
B18
B20
B22
B24
AVDD12_DMPLL
B26
B28
B30
EXT_CAP
B32
DACOUT3
B34
B36
B38
B40
B42
C1
FE_SFCLK
C3
C5
C7
C9
VOUTD11
C11
VOUTD15
C13
www
C15
C17
C19
.
C21
C23
AOSDATA0
C25
NS_XTALO
http://www.xiaoyu163.com
I/O
FESFDO
I
Serial data input terminal for the front-end serial fl ash
VOUTD1
-
Not used
VOUTD5
-
Not used
VOUTD9
-
Not used
-
Not used
VIND0
O
Serial data transfer clock signal output to the digital audio interface receiver
VIND12
I
CSFLAG signal input from the digital audio interface receiver
VIND16
-
Not used
GPIO1
I
Busy request signal input from the system controller
SPDIF
O
Digital audio data output terminal
SPBCK
I
Bit clock signal input from the digital audio interface receiver
-
Power supply terminal (+1.2V)
O
System clock signal output terminal (27 MHz)
CH1_M
O
TMDS data (negative) output to the HDMI ARC OUT connector
CLK_M
O
TMDS clock signal (negative) output to the HDMI ARC OUT connector
O
Not used
O
Video signal (Pr/Cr) output terminal
VCLK
O
Serial data transfer clock signal output to the system controller
UARXD
-
Not used
ETRXD3
I
Receive data input from the ethernet interface
ETRXD0
I
Receive data input from the ethernet interface
I
Receive clock signal input from the ethernet interface
FESFCS
I
Chip select signal input terminal for the front-end serial fl ash
VOUTD3
-
Not used
VOUTD7
-
Not used
-
Not used
-
Not used
VIND4
O
Reset signal output to the digital audio interface receiver
VIND14
-
Not used
-
Not used
GPIO3
O
Power on/off control signal output terminal for the USB section
SPLRCK
I
L/R sampling clock signal input from the digital audio interface receiver
AOBCK
O
Bit clock signal output to the audio section
-
Power supply terminal (+1.2V)
CH2_M
O
TMDS data (negative) output to the HDMI ARC OUT connector
CH0_M
O
TMDS data (negative) output to the HDMI ARC OUT connector
-
Not used
O
Video signal (Pb/Cb) output terminal
VDATA
I
Serial data input from the system controller
IR
I
Error signal input from the digital audio interface receiver
ETMDIO
I/O
Two-way data bus with the ethernet interface
ETRXD1
I
Receive data input from the ethernet interface
ETRXER
I
Receive error signal input from the ethernet interface
O
Serial data transfer clock signal output terminal for the front-end serial fl ash
FESFDI
O
Serial data output terminal for the front-end serial fl ash
VOUTD4
-
Not used
VOUTD8
-
Not used
-
Not used
-
Not used
VIND11
-
Not used
VIND15
-
Not used
GPIO0
x
ao
O
Request signal output to the system controller
y
GPIO2
I
Chip select signal input from the system controller
i
SPMCLK
I
Master clock signal input from the digital audio interface receiver
O
Digital audio data output to the power amp
I
System clock signal input terminal (27 MHz)
http://www.xiaoyu163.com
8
Not used
Q Q
3
6 7
1 3
u163
.
2 9
9 4
2 8
Description
1 5
0 5
8
2 9
9 4
m
co
HBD-E770W
9 9
2 8
9 9
77

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents