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ST AutoDevKit BMS Manuals
Manuals and User Guides for ST AutoDevKit BMS. We have
1
ST AutoDevKit BMS manual available for free PDF download: User Manual
ST AutoDevKit BMS User Manual (88 pages)
battery management system (BMS) evaluation boards
Brand:
ST
| Category:
Motherboard
| Size: 8 MB
Table of Contents
Figure 1. Autodevkit BMS Evaluation Board Range
2
BMS Evaluation Board Overview
3
AEK-POW-BMS63EN Overview
3
Features
3
Main Components
3
AEK-POW-BMSNOTX Overview
4
Features
4
Figure 2. AEK-POW-BMS63EN Main Components
4
Main Components
5
Figure 3. AEK-POW-BMSNOTX Main Components
5
AEK-POW-BMSWTX Overview
6
Features
6
Main Components
6
Embedded Devices
7
L9963E
7
Figure 4. AEK-POW-BMSWTX Main Components
7
L9963T
8
Voltage Operating Range
8
Linear Regulators
8
Simplified State Machine
9
Figure 5. State Machine
9
Figure 6. Daisy Chain Addressing Procedure
10
Figure 7. Addressing Procedure Example for the AEK-POW-BMS63EN
11
BMS Topologies
13
Centralized Configuration
13
Figure 8. Centralized BMS Diagram
13
Dual Access Ring Configuration
14
Figure 9. Example of Centralized BMS Chain Using the AEK-POW-BMS63EN with the AEK-COM-ISOSPI1 and the AEK- MCU-C4MLIT1
14
Figure 10. Dual Access Ring BMS Diagram
14
Figure 11. Dual Ring Configuration Example for the AEK-POW-BMS63EN
15
Voltage Conversion Routine
16
Figure 12. Finite State Machine of the Voltage Conversion Routine
17
Coulomb Counting Routine
18
Cell Current Measurement
19
L9963E Safety and Diagnostic Features
20
Cell UV/OV Diagnostic
20
Total Battery VBAT Diagnostic
20
VBAT Overvoltage
20
VBAT Undervoltage
20
Cell Open Wire Diagnostic
20
Cell Open with ADC_CROSS_CHECK = 0
20
Cell Open with ADC_CROSS_CHECK = 1
21
PCB Open Diagnostic
21
Die Temperature Diagnostic and Overtemperature
21
Fault Condition in Daisy Chains
22
Figure 13. Fault LED on the AEK-COM-ISOSPI1
22
L9963E Cell Balancing
23
Passive Cell Balancing with Internal Mosfets
23
Figure 14. Cell Monitoring with Internal Balancing
23
Methods for SOC Estimation
24
Figure 15. Equivalent Circuit
24
Autodevkit Ecosystem
26
AEK-POW-BMSCHAIN Component Folder Structure
26
Software Component Architecture (AEK-POW-BMSCHAIN Component RLA)
26
Figure 16. AEK-POW-BMSCHAIN Component Folder Structure
26
How to Import the AEK-POW-BMSCHAIN Component in Autodevkit
27
Figure 17. Software Architecture
27
Figure 18. Adding Components
28
Figure 19. Adding Spc58Ecxx Platform Component RLA
28
Figure 20. Selecting AEK-POW-BMSCHAIN Component
29
Figure 21. AEK-POW-BMSCHAIN Component Visualization in the Project Explorer and Application Configuration Windows
29
Chain Allocation
30
Figure 22. AEK-POW-BMSCHAIN Component Selection
30
Figure 23. Chain Customization
30
Figure 24. Chain Topology Selection
31
Figure 25. New Node Addition and Customization
31
Figure 26. BMS Element Field Customization Details
32
Figure 27. Single Access Mode Customization
32
Figure 28. Dual Access Mode Customization
33
Figure 29. Example of Chain Configuration
33
Figure 30. Customizing the Sensing Resistor
34
Figure 31. SPI Configuration for Single Access Mode
34
Figure 32. SPI Configuration for Dual Access Mode
35
Figure 33. Cell Selection and Configuration
35
Figure 34. GPIO Configuration
36
Figure 35. GPIO Voltage Acquisition Mode Configuration
36
Figure 36. Voltage Thresholds Association for Enabled Cells
37
Figure 37. Voltage Thresholds Association for the Entire Battery Pack
37
Figure 38. Communication Timeout Field Enablement
38
Figure 39. Coulomb Counter Field Enablement
38
Figure 40. over Current Threshold Mask Field Enablement
39
Figure 41. Overcurrent Threshold Configuration
39
Figure 42. ADC Filter SOC Field Configuration
40
Figure 43. ADC Filter Cycle Field Configuration
40
Figure 44. ADC Filter Sleep Field Configuration
41
Figure 45. Periodic Acquisition Configuration
41
Figure 46. Vtref Voltage Regulator Configuration
42
Figure 47. Temperature Threshold Configuration
42
Figure 48. MCU ADC Voltage Configuration When Including an AEK-POW-BMSNOTX
43
Figure 49. Automatic Allocation for All Customized Chains
43
Available Demos
44
Figure 50. AEK-POW-BMSCHAIN Library C Code Generation and Compilation
44
Figure 51. Board View
44
Centralized Application
45
Aek_Pow_Bmswtx_Soc_Est_Singleaccess_Chain Application for Discovery Demo)
45
Figure 52. Available Demos
45
Figure 53. SPC58EC - Aek_Pow_Bmswtx_Soc_Est_Singleaccess_Chain Code
45
Dual Ring Application
46
Application for the Discovery Demo)
46
Figure 54. Core 2 Enablement
46
Figure 55. SPC58EC - Aek_Pow_Bmswtx_Dualaccess_Chain Code
47
Single Centralized Application
48
Aek_Pow_Bms63En_Soc_Estimation_Single Application for Discovery Demo)
48
Figure 56. SPC58EC - Aek_Pow_Bmswtx_Dualaccess_Chain Code
48
Available Apis
51
Table 1. Chain Management Apis
51
Table 2. CRC Apis
51
Table 3. ISOSPI Management Apis
51
Table 4. Node Management Apis
51
Table 5. NTC Management Apis
55
Table 6. SPI Handling Apis
56
Waveforms
57
Figure 57. 14-Cell Voltage Discharge with an Active Load of 1 a
57
Figure 58. Battery Pack Voltage Discharge with an Active Load of 1 a
57
Process Timing
58
Figure 59. 14 Cell Voltages During Balancing
58
Table 7. Task Process Timing
58
AEK-POW-BMS63EN Schematic Diagrams
59
Figure 60. AEK-POW-BMS63EN Schematic Diagram
59
AEK-POW-BMS63EN Bill of Materials
60
Table 8. AEK-POW-BMS63EN Bill of Materials
60
AEK-POW-BMS63EN Board Versions
63
Table 9. AEK-POW-BMS63EN Versions
63
AEK-POW-BMS63EN Regulatory Compliance Information
64
AEK-POW-BMSNOTX Schematic Diagrams
65
Figure 61. AEK-POW-BMSNOTX Circuit Schematic (1 of 2)
65
Figure 62. AEK-POW-BMSNOTX Circuit Schematic (2 of 2)
66
AEK-POW-BMSNOTX Bill of Materials
67
Table 10. AEK-POW-BMSNOTX Bill of Materials
67
AEK-POW-BMSNOTX Board Versions
71
Table 11. AEK-POW-BMSNOTX Versions
71
AEK-POW-BMSNOTX Regulatory Compliance Information
72
AEK-POW-BMSWTX Schematic Diagrams
73
Figure 63. AEK-POW-BMSWTX Circuit Schematic (1 of 2)
73
Figure 64. AEK-POW-BMSWTX Circuit Schematic (2 of 2)
74
AEK-POW-BMSWTX Bill of Materials
75
Table 12. AEK-POW-BMSWTX Bill of Materials
75
AEK-POW-BMSWTX Board Versions
80
Table 13. AEK-POW-BMSWTX Versions
80
AEK-POW-BMSWTX Regulatory Compliance Information
81
Revision History
82
Table 14. Document Revision History
82
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