Silicon Laboratories EFR32ZG23 Manuals
Manuals and User Guides for Silicon Laboratories EFR32ZG23. We have 1 Silicon Laboratories EFR32ZG23 manual available for free PDF download: Reference Manual
Silicon Laboratories EFR32ZG23 Reference Manual (1251 pages)
Wireless SoC
Brand: Silicon Laboratories
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Category: Single board computers
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Size: 13 MB
Table of Contents
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Introduction29
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Conventions30
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Introduction33
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Introduction37
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Features38
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Trustzone39
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Introduction43
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Bus Matrix45
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Flash46
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Sram46
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Peripherals46
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Introduction54
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Receive Mode55
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Introduction58
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Features59
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Bootloader60
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Wait-States60
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Ram Retention103
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Ecc104
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Bus Faults104
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MSC Register Map131
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Introduction145
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Features145
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Debug Pins146
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Introduction147
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Features147
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System Clocks151
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Energy Modes160
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Clock Output160
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Interrupts161
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Protection161
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CMU Register Map162
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Oscillators191
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Introduction191
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Features192
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Introduction216
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Features216
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Output to GPIO218
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Introduction226
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Features226
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Introduction234
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Features234
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Introduction244
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Features244
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Introduction250
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Features251
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Introduction251
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Introduction253
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Features253
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ARM Trustzone256
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SMU Lock258
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SMU Register Map259
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Introduction281
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Secure Debug282
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SE Mailbox283
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Sending Commands283
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Introduction287
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Features288
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Energy Modes290
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Power Domains296
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Voltage Scaling296
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Register Resets309
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Register Locks309
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EMU Register Map310
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Introduction341
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Features341
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Producers344
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Consumers351
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PRS Register Map352
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Introduction420
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Features420
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Initialization422
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DMA Usage422
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Introduction435
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Features436
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Counter436
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Compare Events436
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Capture Events437
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Introduction449
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Features449
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Clock Selection450
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Configuration450
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Counter451
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Compare Channel452
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Interrupts452
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Register Lock452
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Introduction463
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Introduction465
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Features465
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One-Shot Mode469
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Buffered Mode470
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Double Mode471
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Clock Frequency472
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Debug473
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Output Action474
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PRS Output474
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Interrupts474
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Register Access474
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One Shot Mode476
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DOUBLE Mode476
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BUFFERED Mode477
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PWM Output479
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Introduction497
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Features498
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Register Access499
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Counter Modes500
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Debug Mode521
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Introduction553
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Features554
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Debug Halt578
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PRS RX Input578
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PRS CLK Input579
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DMA Support579
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Timer580
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Interrupts585
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Introduction627
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Features628
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Debug Halt646
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PRS RX Input654
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PRS CLK Input654
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DMA Support654
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Introduction688
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Features688
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I2C-Bus Overview690
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Enable and Reset694
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Clock Generation695
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Arbitration695
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Buffers695
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Leader Operation698
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Bus States706
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Error Handling711
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DMA Support713
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Interrupts713
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Wake-Up713
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I2C Register Map714
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Introduction733
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Features734
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Register Access736
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Clocking737
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Window Compare758
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Interrupts759
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IADC_EN - Enable763
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Introduction791
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Features792
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Slew Rate796
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Input Disable796
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EM4 Wakeup797
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Output to PRS799
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Synchronization807
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Introduction979
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Features980
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Block Diagram981
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Arbitration988
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Interrupts994
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Debugging994
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Examples994
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Copy1001
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Ping-Pong1003
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Scatter-Gather1004
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LDMA Register Map1007
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Introduction1033
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Features1033
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Clock Source1034
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Debug Functionality1034
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Energy Mode Handling1034
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Warning Interrupt1034
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Window Interrupt1035
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WDOG Register Map1037
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Introduction1046
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Features1046
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LCD Frame Rates1048
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LCD Contrast1075
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Data Update1076
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Frame Counter (FC)1078
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Display Counter1079
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LCD Interrupt1079
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LCD DMA Transfer1079
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LCD Synchronization1083
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LCD Register Map1084
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LCD_EN - Enable1087
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PCNT - Pulse Counter1103
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Introduction1103
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Features1103
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Pulse Counter Modes1104
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Hysteresis1111
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Auxiliary Counter1112
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Register Access1112
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Clock Sources1112
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Input Filter1113
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Edge Polarity1113
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Interrupts1113
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PCNT Register Map1115
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Introduction1131
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Features1131
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Scan Sequence1135
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Sensor Timing1136
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Sensor Interaction1138
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Sensor Sampling1139
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Sensor Evaluation1140
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Threshold Comparison1140
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Sliding Window1141
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Step Detection1141
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Decoder1142
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Measurement Results1144
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DMA Requests1144
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Prs1145
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Programmer's Model1145
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LESENSE Register Map1146
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LESENSE_EN - Enable1150
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Introduction1180
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Features1181
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Power Supply1182
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Clock Selection1184
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Conversions1185
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Conversion Trigger1186
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Refresh Trigger1186
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PRS Communication1186
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Reference Selection1187
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Power Modes1187
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Output Mode1188
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Internal Timers1188
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Fifo1189
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Keepwarm Sub-Modes1189
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LDMA Interface1189
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LESENSE Operation1191
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VDAC Register Map1193
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Introduction1212
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Features1212
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Warmup Time1214
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Response Time1214
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Hysteresis1215
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LESENSE Interface1215
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VREFDIV Sources1216
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ACMP Register Map1219
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Introduction1232
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Features1232
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Clocking and Timing1233
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Scanning1234
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Wake on Key1235
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KEYSCAN Register Map1236
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KEYSCAN_EN - Enable1237
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KEYSCAN_CFG - Config1239
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Revision History1246
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