Maxim Integrated MAX32650 Manuals

Maxim Integrated MAX32650 Manuals

Manuals and User Guides for Maxim Integrated MAX32650. We have 1 Maxim Integrated MAX32650 manual available for free PDF download: User Manual

Maxim Integrated MAX32650 User Manual

Maxim Integrated MAX32650 User Manual (411 pages)

Brand: Maxim Integrated | Category: Microcontrollers | Size: 10 MB

Table of Contents

Table of Contents
2
Overview

23
- Block Diagram
  24
- Figure 1-1: MAX32650-MAX32652 Block Diagram
  24
Memory, Register Mapping, and Access

26
- Memory, Register Mapping, and Access Overview
  26
- Figure 2-1: MAX32650-MAX32652 Code Memory Mapping
  27
- Standard Memory Regions
  28
  - Code Space
    28
  - Figure 2-2 Code Memory Mapping
    28
  - SRAM Space
    29
  - Peripheral Space
    30
  - External RAM Space
    30
  - External Device Space
    30
  - System Area (Private Peripheral Bus)
    31
  - System Area (Vendor Defined)
    31
- Device Memory Instances
  31
  - Main Program Flash Memory
    31
  - Cache Memories
    31
  - External Memory Cache Controller (EMCC)
    31
  - Information Block Flash Memory
    31
  - System SRAM
    32
  - AES Key and Working Space Memory
    32
  - MAA Key and Working Space Memory
    32
  - TPU Memory
    32
- AHB Interfaces
  32
  - Core AHB Interfaces
    32
  - AHB Masters
    32
- Peripheral Register Map
  33
System Clocks, Reset, and Power Management

36
Interrupts and Exceptions

84
- Features
  84
- Interrupt Vector Table
  84
- Table 4-1: MAX32650 Interrupt Vector Table
  84
General-Purpose I/O and Alternate Function Pins

87
Flash Controller

115
- Overview
  115
- Usage
  115
- Clock Configuration
  115
  - Table 6-1: Internal Flash Memory Organization
    115
  - Flash Write
    116
  - Flash Write Width
    116
  - Lock Protection
    116
  - Table 6-2: Valid Addresses for 32-Bit and 128-Bit Internal Flash Writes
    116
  - Mass Erase
    117
  - Page Erase
    117
- Flash Controller Registers
  117
- Table 6-3: Page Boundary Address Range for Page Erase Operations
  117
- Table 6-4: Flash Controller Registers
  117
- Flash Controller Register Details
  118
- Table 6-5: Flash Controller Interrupt Register
  120
- Table 6-6: Flash Controller Data Register 0
  120
- Table 6-7: Flash Controller Data Register 1
  121
- Table 6-8: Flash Controller Data Register 2
  121
- Table 6-9: Flash Controller Data Register 3
  121
External Memory

122
Standard DMA Controller

212
Analog to Digital Converter

234
- Figure 10-1: Analog to Digital Converter Block Diagram
  235
Color LCD-TFT Controller

246
12 Uart

262
Pulse Train Engine

297
Timers

316
- Timer Pin Functionality
  317
- Continuous Mode (001B)
  320
  - Continuous Mode Configuration
    321
  - Figure 15-3: Counter Mode Diagram
    322
- Counter Mode (010B)
  322
  - Counter Mode Configuration
    323
- PWM Mode (011B)
  324
- Figure 15-4: Capture Mode Diagram
  326
- Capture Mode (100B)
  326
  - Capture Mode Configuration
    327
  - Figure 15-5: Counter Mode Diagram
    328
- Compare Mode (101B)
  328
  - Compare Mode Configuration
    329
  - Figure 15-6: Gated Mode Diagram
    330
- Gated Mode (110B)
  330
- Capture/Compare Mode (111B)
  331
- Table 15-1: Timer Register Offset, Names, Access and Descriptions
  332
- Table 15-2: Timer Count Registers
  332
- Table 15-3: Timer Compare Registers
  332
- Table 15-4: Timer PWM Register
  332
- Table 15-5: Timer Interrupt Registers
  333
- Table 15-6: Timer Control Registers
  333
- Table 15-7: Timer Non-Overlapping Compare Registers
  335
- Figure 16-1: Watchdog Timer Block Diagram
  336
Watchdog Timer (WDT)

336
- Table 16-1: Watchdog Timer Interrupt Period
  337
Wire Master

342
- Pin Configuration
  343
- Figure 17-1: 1-Wire Signal Interface
  344
- Networking Layers
  344
- Figure 17-2: 1-Wire Reset Pulse
  345
- Read and Write Time Slots
  345
  - Figure 17-3: 1-Wire Write Time Slot
    346
  - Figure 17-4: 1-Wire Read Tme Slot
    346
  - OWM Read Time Slot
    346
  - Figure 17-5: 1-Wire ROM ID Fields
    347
  - Table 17-2: 1-Wire ROM Commands
    347
- Standard Speed and Overdrive Speed
  347
- OWM Register Details
  353
- Table 17-6: OWM Clock Divisor Register
  354
- Table 17-7: OWM Control/Status Register
  354
- Table 17-8: OWM Data Register
  355
- Table 17-9: OWM Interrupt Flag Register
  355
- Table 17-10: OWM Interrupt Enable Register
  356
USBHS 2.0 Hi-Speed Host Interface with PHY

357
Quad Serial Peripheral Interface (SPI3)

384
Trademarks

411

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