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Manuals and User Guides for Maxim Integrated MAX31782. We have
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Maxim Integrated MAX31782 manual available for free PDF download: User Manual
Maxim Integrated MAX31782 User Manual (223 pages)
Brand:
Maxim Integrated
| Category:
Microcontrollers
| Size: 11 MB
Table of Contents
Max31782 User's Guide
2
Table of Contents
2
SECTION 1: Overview
3
Section 2: Architecture
6
Instruction Decoding
6
Figure 2-1. Instruction Word Format
6
Register Space
7
Memory Types
8
Flash Memory
8
Table2-1.Register-To-RegisterTransferOperations
8
SRAM Memory
9
Stack Memory
9
Program and Data Memory Mapping and Access
9
Data Memory Access
10
Data Pointers
10
Program Memory Access
10
Program Memory Mapping
11
Utility ROM
11
Data Memory Mapping
12
Frame Pointer
12
Memory Map When Executing from Flash Memory
13
Memory Map When Executing from Utility ROM
14
Memory Map When Executing from SRAM
15
Data Alignment
16
Reset Conditions
16
Power-On/Brownout Reset
16
External Reset
17
Figure 2-6. MAX31782 State Diagram
17
Internal System Resets
17
Watchdog Timer Reset
17
Clock Generation
18
Power Modes
18
Table2-2.StateOfCircuitsDuringDifferentModes
18
Section 3: System Register Descriptions
19
This Section Contains the Following Information
19
Accumulator Pointer Control Register (APC, 8H[1H])
22
Accumulator Pointer Register (AP, 8H[0H])
22
System Register Bit Descriptions
22
Interrupt and Control Register (IC, 8H[5H])
23
Processor Status Flags Register (PSF, 8H[4H])
23
Interrupt Mask Register (IMR, 8H[6H])
24
System Control Register (SC, 8H[8H])
24
Interrupt Identification Register (IIR, 8H[Bh])
25
System Clock Control Register (CKCN, 8H[Eh])
25
Watchdog Control Register (WDCN, 8H[Fh])
26
Accumulator N Register (A[N], 9H[Nh])
27
Instruction Pointer Register (IP, Ch[0H])
27
Prefix Register (Pfx[N], Bh[N])
27
Frame Pointer Offset Register (OFFS, Eh[3H])
28
Interrupt Vector Register (IV, Dh[2H])
28
Loop Counter 0 Register (LC[0], Dh[6H])
28
Loop Counter 1 Register (LC[1], Dh[7H])
28
Stack Pointer Register (SP, Dh[1H])
28
Data Pointer Control Register (DPC, Eh[4H])
29
General Register (GR, Eh[5H])
29
General Register Low Byte (GRL, Eh[6H])
29
Data Pointer 0 Register (DP[0], Fh[3H])
30
Frame Pointer Base Register (BP, Eh[7H])
30
Frame Pointer Register (FP, Eh[Bh])
30
General Register Byte-Swapped (GRS, Eh[8H])
30
General Register High Byte (GRH, Eh[9H])
30
General Register Sign Extended Low Byte (GRXL, Eh[Ah])
30
Data Pointer 1 Register (DP[1], Fh[7H])
31
Section 5: Interrupts
36
Module Interrupt Identification Registers
37
Peripheral Module 2 Interrupt Identification Register (MIIR2, M2[03H])
41
Peripheral Module 3 Interrupt Identification Register (MIIR3, M3[10H])
41
Peripheral Module 4 Interrupt Identification Register (MIIR4, M4[10H])
41
Peripheral Module 5 Interrupt Identification Register (MIIR5, M5[18H])
42
Servicing Interrupts
37
Interrupt System Operation
42
SynchronousVs.AsynchronousInterruptSources
42
Interrupt Prioritization by Software
43
Interrupt Exception Window
43
Section 6: Analog-To-Digital Converter (Adc)
44
Detailed Description
45
Conversion Modes
45
Conversion Sequencing
46
ADC Conversion Time
46
ADC Data Reading
48
ADC Interrupts
48
Using an External Reference
48
Stop Mode Operation
48
ADC Status Register (ADST)
50
ADC Address Register (ADADDR)
50
ADC Data and Configuration Register (ADDATA)
51
ADC Configuration Register (ADDATA When ADCFG = 1)
51
External Temperature Slope Control Register (ETS)
53
ADC External Temperature Offset Register (TOEX)
54
ADC Voltage Offset Register (ADVOFF)
54
ADC Voltage Scale Trim Registers (ADCG1 and ADCG5)
54
ADC Code Examples
55
One Sequence of Four Temperature and Voltage Conversions
55
Continuous Conversion of 16 Samples
56
2 Section 7: IC-Compatible Slave Interface
57
SECTION 7: I C-Compatible Slave Interface
57
Slave Address
59
C START Detection
59
C STOP Detection
59
Slave Address Matching
59
Transmitting Data
60
Receiving Data
61
Clock Stretching
62
Section 8: I
63
Smbus Timeout
63
Resetting the I 2 C Slave Controller
63
Operation as a Master
63
Gpio
63
I 2 C Slave Status Register (I2CST_S)
65
I 2 C Slave Interrupt Enable Register (I2CIE_S)
66
I 2 C Slave Address Register (I2CSLA_S)
67
I 2 C Slave Data Buffer Register (I2CBUF_S)
67
Section 8: I 2 C-Compatible Master Interface
69
Detailed Description
70
Description of Master I
70
Default Operation
70
C Clock Generation
70
Timeout
71
Generating a START
72
Generating a STOP
73
Transmitting a Slave Address
73
Transmitting Data
74
Receiving Data
75
C Master Clock Stretching
75
Resetting the I
76
Operation as a Slave
76
Gpio
76
Section 8: I
70
I 2 C Master Controller Register Descriptions
77
I 2 C Master Control Register (I2CCN_M)
77
I 2 C Master Status Register (I2CST_M)
78
I 2 C Master Interrupt Enable Register (I2CIE_M)
79
I 2 C Master Data Buffer Register (I2CBUF_M)
79
I 2 C Master Clock Control Register (I2CCK_M)
80
I 2 C Master Timeout Register (I2CTO_M)
80
I 2 C Master Address Register (I2CSLA_M)
80
Smbus Mode Selection Register (SMBUS)
81
SECTION 9: PWM Outputs
82
SECTION 10: Fan Tachometer
89
Section 11: General-Purpose Input/Output (Gpio) Pins
95
GPIO Port 1 Register Descriptions
98
GPIO Direction Register Port 1 (PD1)
98
GPIO Output Register Port 1 (PO1)
98
GPIO Input Register for Port 1 (PI1)
98
GPIO Port 2 Register Descriptions
99
GPIO Direction Register Port 2 (PD2)
99
GPIO Output Register Port 2 (PO2)
99
GPIO Input Register for Port 2 (PI2)
99
GPIO Port 6 Register Descriptions
100
GPIO Direction Register Port 6 (PD6)
100
GPIO Output Register Port 6 (PO6)
100
GPIO Input Register for Port 6 (PI6)
101
GPIO Port 6 External Interrupt Edge Select Register (EIES6)
101
GPIO Port 6 External Interrupt Flag Register (EIF6)
101
GPIO Port 6 External Interrupt Enable Register (EIE6)
101
GPIO Code Example
102
Section 12: Timer B Module
103
Detailed Description
104
Auto-Reload Mode
105
Up/Down Count with Auto-Reload
106
Capture Mode
107
Clock Output Mode
108
PWM Output Mode
109
Up Count PWM Output Mode
110
Up/Down Count PWM Output Mode
111
Timer B Register Descriptions
112
Timer B Control Register (TB0CN)
112
Timer B Value Register (TB0V)
113
Timer B Capture/Reload Register (TB0R)
113
Timer B Compare Register (TB0C)
113
Timer B Code Examples
114
Auto-Reload Mode
114
Clock Output Mode
114
PWM Output Mode
114
SECTION 13: Supply Voltage Monitor
115
Section 14: Hardware Multiplier
116
Hardware Multiplier Organization
117
Hardware Multiplier Controls
118
Hardware Multiplier Operations
118
Accessing the Multiplier
119
Register Output Selection
118
Signed-Unsigned Operand Selection
118
Operand Count Selection
118
Hardware Multiplier Peripheral Registers
120
Multiplier Control Register (MCNT)
121
SECTION 15: Watchdog Timer
125
Section 16: Test Access Port (Tap)
129
TAP Controller
130
TAP State Control
132
Test-Logic-Reset
132
Run-Test-Idle
132
IR-Scan Sequence
132
DR-Scan Sequence
133
Communication Via TAP
134
TAP Communication Examples-IR-Scan and DR-Scan
134
Section 17: In-Circuit Debug Mode
136
Background Mode Operation
138
Breakpoint Registers
140
Using Breakpoints
142
Debug Mode
142
Debug Mode Commands
143
Read Register Map Command Host-ROM Interaction
145
Single Step Operation (Trace)
146
Return
147
Debug Mode Special Considerations
147
In-Circuit Debug Control Register (ICDC, M2[1Ah])
149
In-Circuit Debug Flag Register (ICDF, M2[1Bh])
150
In-Circuit Debug Buffer Register (ICDB, M2[1Ch])
150
Section 18: In-System Programming
152
Detailed Description
154
Password Protection
155
Entering JTAG Bootloader
155
Entering I
156
C Bootloader
156
I 2 C System Programming Buffer Register (I2C_SPB)
157
Bootloader Operation
157
JTAG Bootloader Protocol
157
C Bootloader Protocol
158
Bootloader Commands
159
Command 00H-No Operation
159
Command 01H-Exit Loader
159
Command 02H-Master Erase
160
Command 03H-Password Match
160
Command 04H-Get Status
160
Command 05H-Get Supported Commands
161
Command 06H-Get Code Size
161
Command 07H-Get Data Size
161
Command 08H-Get Loader Version
162
Command 09H-Get Utility ROM Version
162
Command 0Eh-Get Device Number
162
Command 10H-Load Code
162
Command 11H-Load Data
163
Command 20H-Dump Code
163
Command 21H-Dump Data
163
Command 30H-CRC Code
164
Command 31H-CRC Data
164
Command 40H-Verify Code
164
Command 41H-Verify Data
164
Command 50H-Load and Verify Code
165
Command 51H-Load and Verify Data
165
Command E0H-Code
165
SECTION 19: Programming
166
SECTION 20: Instruction Set Summary
184
SECTION 21: Utility ROM
217
Revision History
223
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