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netX 90
hilscher netX 90 Manuals
Manuals and User Guides for hilscher netX 90. We have
3
hilscher netX 90 manuals available for free PDF download: Technical Reference Manual, Production Manual, Design-In Manual
hilscher netX 90 Technical Reference Manual (227 pages)
Brand:
hilscher
| Category:
Microcontrollers
| Size: 2.91 MB
Table of Contents
Table of Contents
2
Introduction
3
1 Introduction
5
About this Document
5
List of Revisions
5
References to Documents
5
2 General Description and Features
6
DOC160609TRG02EN | Revision 2 | English | 2018-09 | Preliminary | Public © Hilscher
7
Block Diagram
8
Technical Data Netx 90
9
Netx 90 Signal Description
11
3 Core
16
Cpu
16
Cortex®-M4 CPU
16
Xpic CPU
16
Dmac
17
Overview
17
Features
18
Typical Applications
18
Functional Description
19
Data Transfer
20
DMA Channel Priority
21
DMA Flow Control
21
Crypto Core
21
Memory Map
22
Brown-Out Detector (BOD)
23
Power-On Reset and DC/DC
24
System Clock (Oscillator)
25
Temperature Sensor
25
Interrupt Vectors
26
Timer
28
CPU Timer
28
IEEE 1588 System Time
29
Watchdog
30
Function
30
WDG_ACT Signal
30
Internal Memory
31
Internal Flash
31
Internal RAM
31
External Memory
32
Overview
32
Features
33
SDRAM Interface
34
Sram/Flash Interface to Memory Interface Controller
46
4 Booting and SYS LED
57
Boot Sequence
57
Alternative Boot Mode
59
System LED
59
5 Interfaces
60
MMIO - Multiplex Matrix
60
Host Interface
62
Overview
62
Block Diagram
62
Features
63
Dual-Port Memory Interface Structure
64
Parallel Dual-Port Memory Interface
65
Serial Dual-Port Memory Interface
78
Handshake Registers
85
Parallel Dual-Port Memory Timing
88
Serial Dual-Port Memory Timing
118
Sqi/Spi
127
Overview
127
Sqi
129
Spi0
146
Sqi0
151
Overview
152
Block Diagram
153
Features
154
Typical Applications
154
Functional Description
154
I2C Devices
154
I2C Signals
154
I2C Signal Conditions
155
I2C Transfers
155
I2C Acknowledge Handling
156
I2C 10-Bit Addressing
156
I2C General Call
157
I2C Cycle Stretching
157
I/O Timing
158
Multi LED
159
Overview
159
Features
159
Typical Applications
160
Functional Description
160
Time-Multiplexed PWM Mode
161
Pass-Through Mode
162
Features for both Modes
162
Gpio
163
Overview
163
Features
165
Typical Applications
166
Functional Description
166
Simple Read/Write Modes
166
Counter as System Timer
167
Event Time Capture
167
Event Counting
169
Active Time Measurement
170
Watchdog Mode
170
Standard PWM
171
PWM with Shadow Registers
171
DC-DC Pwm
173
Sequencer
174
Sharing between Different Cpus
175
Interrupt Handling
175
I/O Timing
176
PIO (Application)
177
Biss/Ssi
178
Overview
178
Functional Description
178
Trigger Sources
179
Interrupt Logic
179
Endat
180
Overview
180
Functional Description
180
Trigger Sources
181
Edge Detector and Pulse Former
181
CAN Controller
182
Features
182
Uart
183
IO-Link Controller
186
Introduction
186
Typical Application
187
Adc
188
Lvds
189
Motion PWM
190
Quadrature Decoder
190
Ethernet Interface
191
Fieldbus Interface
193
7 Electrical Specification
194
Absolute Max. Ratings
195
Power-Up and down Sequencing
195
Power Consumption / Power Dissipation
195
Power Consumption of Netx 90
195
AC/DC Specifications
195
Oscillator
196
Power-On Reset and DC/DC
196
Bod
197
Adc
197
Failure Rate (FIT)
197
6 Debugging
194
8 Netx 90 Package and Signal Information
198
Pin Table Sorted by Signals
198
Pin Table Sorted by Pin Number
204
Pin Overview Netx 90
210
PAD Type Explanation
212
Schematic View of Netx 90 PAD Types
213
Netx 90 Package
214
Thermal Resistance
216
Moisture Sensitivity Level
216
9 Appendix
217
Terms, Abbreviations, and Definitions
217
Legal Notes
219
Registered Trademarks
222
List of Tables
223
List of Figures
224
Contacts
227
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hilscher netX 90 Production Manual (70 pages)
Brand:
hilscher
| Category:
Control Unit
| Size: 1.72 MB
Table of Contents
Hilscher Gesellschaft für Systemautomation Mbh Www.hilscher.com
2
Table of Contents
2
1 Introduction
3
About this Document
3
Description of the Contents
3
List of Revisions
3
Further Relevant Documentation
3
Table 1: List of Revisions
3
Table 2: Additional Documentation
3
Legal Notes
4
Abbreviations
8
Table 3: Abbreviations
8
2 Software Architecture
9
Basics
9
Figure 1: Netx 90 Architecture
9
Figure 2: Software for Communication and Application Cpus (Stand-Alone-Chip Solution)
10
Flash Layout
11
Overview
11
Firmware Use Cases
13
Figure 3: Use Case A: Small Footprint Flash Layout Example
13
Table 4: Flash Area Definition Values of Use Case a
14
Figure 4: Use Case B: Small Footprint Flash Layout Example with Firmware Update Area in
16
Table 5: Flash Area Definition Values of Use Case B
17
Figure 5: Use Case C: Full Featured Loadable Firmware with SDRAM and External SQI Flash
18
Table 6: Flash Area Definition Values of Use Case C
19
Files
20
Overview
20
Table 7: Overview of Files
20
Hardware Configuration File (*.Hwc)
21
Table 8: Flash Area Definition of HW Config in FDL
22
Flash Device Label (*.Fdl)
23
Table 9: Flash Area Definition of FDL in FDL
24
Figure 6: Position and Structure of FDL in INTFLASH
25
Table 10: FDL Header
25
Table 11: FDL Content: Basic Device Data
26
Table 12: FDL Content: MAC Addresses for Communication Side
27
Table 13: FDL Content: MAC Addresses for Application Side
28
Table 14: FDL Content: Product Identification
28
Table 15: FDL Content: OEM Identification
29
Table 16: FDL Content: Flash Layout Table
31
Table 17: FDL Content: Flash Chip Table
32
Table 18: FDL Footer
32
Communication Firmware (*.Nxi)
33
Table 19: Flash Area Definition of COM Firmware in FDL
34
Application Firmware (*.Nai)
35
Maintenance Firmware (*.Mxf)
36
Table 20: Flash Area 4 Definition in FDL for Maintenance Firmware
38
Table 21: Flash Area 5 Definition in FDL for Maintenance Firmware
38
Hardware Configuration File for Maintenance Firmware (*.Mwc)
39
Table 22: Flash Area 3 Definition in FDL for Maintenance HW Config
40
Table 23: Flash Area 4 Definition in FDL for Maintenance HW Config
40
Boot Process
42
Overview
42
Figure 7: Boot Mode Flow Chart
43
Figure 8: Pin Configuration for Operating Modes
44
Console Mode
45
Table 24: Configuration of Console Mode Interfaces
45
Alternative Boot Mode
46
3 End-Of-Line Programming
47
Programming Interface Options
47
Overview
47
Table 25: Programming Options and Interfaces
47
Using Console Mode and Serial/Uart Interface
48
Using Console Mode and "Standard" Ethernet
49
Using Console Mode and Integrated Web Server
50
Figure 9: Netx 90 ROM Code in Windows Explorer
51
Figure 10: Start Page of ROM Code Web Server
52
Figure 11: Write Page
53
Using Debug Interface (JTAG/SWD)
54
Using Console Mode and Host Interface
55
Table 26: Configuration of Console Mode Interfaces
55
How to Use the Command Line Flasher
57
Figure 12: Prompt in Flasher Script Location
58
Table 27: Flasher Commands
58
Table 28: Flasher Parameters and Values
59
Figure 13: Show Interfaces
61
Figure 14: Interface Options Detected by the Command Line Flasher
61
Figure 15: Board Info
62
Figure 16: Example of Entering Flash Parameters
63
Figure 17: Select Interface Prompt
63
Figure 18: Image Flashed
64
Figure 19: Example of Specifying Flasher Interface in Command Line
64
Figure 20: Example of Read Command
65
Figure 21: Example of Erase Command
65
4 End-Of-Line Testing
67
List of Figures
68
Contacts
70
hilscher netX 90 Design-In Manual (66 pages)
Brand:
hilscher
| Category:
Computer Hardware
| Size: 0.93 MB
Table of Contents
Table of Contents
2
1 Introduction
4
About this Document
4
List of Revisions
5
References to Documents
5
2 Basic Concepts
6
Netx 90 - Introduction
6
Netx 90 - Use Cases
7
Design Checklist
8
3 Basic Circuits
10
Power Supply
10
Integrated Core Voltage Regulator
10
Brown-Out Detector (BOD)
11
Power-On Reset and Reset in
12
System Clock
13
Boot Sequence
14
Configuration Pins
14
Console Mode
15
Alterative Boot Mode
15
System RDY/RUN LED
16
External Memory
17
Serial Memory Interface
18
QSPI Flash
18
Parallel Memory Interface
19
Sdram
19
Host Interface
21
Dual-Port Memory
22
8/16-Bit Data Width and Dual-Port Memory Size
22
Control Lines
22
Non-Multiplexed Mode
23
Multiplexed Mode
26
Ready/Busy Signal
27
Serial Port Memory (SPI/QSPI Access to DPM)
28
PIO Signals
29
External Pull-Ups/Pull-Downs, Unused Signals
29
Multiplexed IO Matrix (MMIO)
30
General Purpose Ios
32
Serial Interfaces
33
Uarts
33
Spi
34
Sqi
34
I2C
35
Can
35
IO-Link
36
Motion Control
36
Analog to Digital Converter
37
Encoder Interfaces
37
Fieldbus Interfaces
38
Canopen Interface
38
CC-Link Interface
39
Devicenet Interface
39
PROFIBUS Interface
40
Fieldbus Status Leds
40
Real-Time Ethernet (RTE) Interface
41
Twisted Pair
41
Unused Ethernet Phys
44
Ethernet Status Leds
45
Ethernet Communication Status Leds
45
Real-Time Ethernet Protocol Status Leds
46
Real-Time Ethernet Synchronization Signals
47
4 Debug and Test Interfaces
48
Legacy 20-Pin JTAG Interface
48
JTAG and TPIU Interface (20-Pin)
49
JTAG Interface (10-Pin)
50
Boundary Scan Test
50
5 Firmware Overview and Resources
51
Firmware Variants and Use Cases
51
Firmware Programming and Update
51
6 General Design Considerations
52
Thermal Behavior
52
Basics
52
Estimates
52
Recommendations
52
Rules of Thumb
52
EMC Behavior
53
Layer Stack
53
Decoupling Capacitors
54
Reset Lines
55
Clock Circuits
55
Ethernet Interface
56
Memory Bus
58
Planes
58
Vias and Signal Fan out under Netx 90
59
7 Appendix
60
List of Tables
60
List of Figures
61
Legal Notes
62
Registered Trademarks
65
Contacts
66
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