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SBC347A-11330001
abaco systems SBC347A-11330001 Manuals
Manuals and User Guides for abaco systems SBC347A-11330001. We have
1
abaco systems SBC347A-11330001 manual available for free PDF download: Hardware Reference Manual
abaco systems SBC347A-11330001 Hardware Reference Manual (111 pages)
SBC347A Series VPX Single Board Computer
Brand:
abaco systems
| Category:
Motherboard
| Size: 3.3 MB
Table of Contents
Document History
2
About this Manual
3
Further Information
4
Table of Contents
6
1 Introduction
14
Features
15
Safety Notices
16
Flammability
16
EMI/EMC Regulatory Compliance
16
Cooling
16
Handling
17
Heatsink
17
Figure 1-1 ESD Label (Present on Board Packaging)
17
2 Unpacking
18
Product Identification
18
Inspection
18
Figure 2-1 Product Label (Packaging)
18
3 Configuration
19
Link Configuration
19
Figure 3-1 Link Positions
19
Inspection
20
Link Descriptions
20
Recovery Boot Link (P3)
20
Configuration EEPROM Write Enable Link (P4)
20
Table 3-1 P3 Link Setting
20
Table 3-2 P4 Link Setting
20
4 Installation and Power Up/Reset
21
Power Supply Requirements
21
Board Keying
21
Table 4-1 Power Supply Requirements
21
Board Installation Notes
22
Connecting to SBC347A
23
Rear Transition Module
23
Reset and Power-Up Sequence
24
BIOS Setup Utility
24
Accessing the Setup Menus
24
First Boot Menu
25
Figure 4-1 First Boot Menu
25
About the Setup Menus
26
Main Menu
27
Figure 4-2 Main Menu
27
Advanced Menu
28
Figure 4-3 Advanced Menu
28
Chipset Menu
29
Figure 4-4 Chipset Menu
29
Security Menu
30
Figure 4-5 Security Menu
30
Boot Menu
31
Figure 4-6 Boot Menu
31
Save & Exit Menu
32
Figure 4-7 Save & Exit Menu
32
Event Logs Menu
33
Figure 4-8 Event Logs Menu
33
5 Functional Description
34
Figure 5-1 Block Diagram
34
Microprocessor Subsystem
35
Core I7 Processor
35
Table 5-1 Supported Processor Skus
35
Series Chipset (PCH)
36
Memory
36
Sdram
36
Boot Flash
36
Table 5-2 Supported RAM Configurations
36
Flash Hard Drive
37
Nvram
37
VPX Interface
38
Openvpx Compatibility
38
Module Maskable Reset
38
I/O
38
Data Plane Fabric
39
PCI Express Gen3 Operation
39
Figure 5-2 Additional Pcie Connectivity
39
Control Plane Fabric/Gigabit Ethernet
40
Dual 10GBASE-T
40
Table 5-3 ETH0/ETH1 Pin Mapping - Dual BASE-T Variant
40
Usb
41
Serial Ports
41
Table 5-4 USB Signal Availability
41
Table 5-5 COM Port Connections
41
Figure 5-3 RS422/RS485 Signal Definition
42
RS422/RS485 Mode
42
Table 5-6 COM1/COM2 Signal Availability
42
Sata
43
Table 5-7 SATA Signal Availability
43
Gpio
44
Table 5-8 GPIO Line Signal Availability
44
Video
45
Vga
45
DVI
45
Table 5-9 VGA Signal Availability
45
Table 5-10 DVI Signal Availability
45
LPC Bus
46
Fpga
46
Trusted Platform Monitor
46
Real Time Clock
46
I 2 C Bus
47
Elapsed Time Indicator
47
Figure 5-4 I 2 C Bus Structure
47
Table 5-11 I 2 C Bus Addresses
47
EEPROM DIP Switch
48
Ram Spd Eeprom
48
Table 5-12 DIP Switch Options
48
Board Management Microcontroller (Optional)
49
Figure 5-5 Onboard Sensor and System Management Bus Architecture
49
Table 5-13 BMM I2C Bus Devices
49
Board Temperature Sensor
50
CPU die Temperature Sensor
50
Power Manager/Monitor
50
Table 5-14 Power Manager Monitor Input Connections
50
Timers
51
General Purpose Timers
51
Watchdog Timer
51
Power Sequencing
52
Onboard Sequencing
52
Inter-Board Sequencing
52
Leds
53
Figure 5-6 Rear LED Positions
53
Table 5-15 LED Meanings
53
BIT Leds (DS401 to DS404)
54
Board Reset LED (DS405)
54
Table 5-16 BIT LED Meanings
54
Table 5-17 BIT Status LED Meanings
54
Board Power Good LED (DS407)
55
POST Code Leds (DS414 to DS421)
55
SATA Activity LED (DS413)
55
Sleep Status LED (DS406)
55
SSD Activity LED (DS408)
55
Table 5-18 Power States
55
Jtag
56
Boundary Scan
56
Processor Debug Port
56
Figure 5-7 JTAG Chains
56
Resets and Interrupts
57
Interrupt Controllers
57
Hardware Reset
57
Table 5-19 Reset Sources
57
Fpga
58
Registers
58
AXIS Support
58
Front Panel
59
Air-Cooled Versions (Build Levels 1 to 3)
59
Conduction-Cooled Versions (Build Levels 4 and 5)
59
Figure 5-8 Air-Cooled Front Panel
59
Figure 5-9 Conduction-Cooled Front Panel
59
6 FPGA Registers
60
Board ID Register (0X600)
61
Board Revision Register (0X601)
61
FPGA Revision Register (0X60B)
61
Watchdog Timer Refresh Register (0X60D)
62
Watchdog Timer Control and Status Register LS Byte (0X60E)
62
Watchdog Timer Control and Status Register MS Byte (0X60F)
62
Board ID String Registers (0X610 to 0X61A)
62
BMM/BMC Control Register (0X620)
63
LED Control Register (0X622)
63
BIOS/SPI Control Register (0X625)
63
Table 6-1 FPGA Registers
63
BIT Control and Status Register (0X629)
64
NVRAM Memory Space Page Register (0X635)
64
AXIS Timestamp Registers (0X648 to 0X64D)
64
AXIS Clock Frequency Register (0X64E)
65
AXIS Clock Control Register (0X64F)
65
Timer 0 Control and Status Register 1 (0X650) and Timer 1 Control and Status Register 1 (0X658)
65
Timer 0 Control and Status Register 2 (0X651) and Timer 1 Control and Status Register 2 (0X659)
66
Timer 0 IRQ Clear Register (0X652) and Timer 1 IRQ Clear Register (0X65A)
66
Timer 0 Data Bytes 0 to 3 Registers (0X654 to 0X657)
66
Reads
66
Writes
67
Timer 1 Data Bytes 0 to 3 Registers (0X65C to 0X65F)
67
Reads
67
GPIO out Register (0X670)
67
GPIO in Register (0X671)
68
GPIO Direction Register (0X672)
68
GPIO Interrupt Enable Register (0X673)
68
GPIO Level/Edge Register (0X674)
68
GPIO Active Low/High Register (0X675)
68
GPIO both Edges Register (0X676)
69
GPIO Interrupt Status Register (0X677)
69
GPIO7 to GPIO0 Availability Register (0X678)
69
GPIO15 to GPIO8 Availability Register (0X684)
70
VPX GDISCRETE1 out Register (0X688)
70
VPX GDISCRETE1 in Register (0X689)
70
VPX GDISCRETE1 Direction Register (0X68A)
70
VPX GDISCRETE1 Interrupt Enable Register (0X68B)
70
VPX GDISCRETE1 Level/Edge Register (0X68C)
70
VPX GDISCRETE1 Active Low/High Register (0X68D)
71
VPX GDISCRETE1 both Edges Register (0X68E)
71
VPX GDISCRETE1 Interrupt Status Register (0X68F)
71
VPX GDISCRETE1 Availability Register (0X690)
71
Ethernet Port Availability Register (0X6A0)
72
COM Port Availability Register (0X6A1)
72
COM Port 4-Wire Configuration Register (0X6A2)
72
COM Port Modem Configuration Register (0X6A3)
73
SATA Port Availability Register (0X6A4)
73
USB2.0 Port Availability Register (0X6A5)
73
USB3.0 Port Availability Register (0X6A6)
74
USB2.0 Port 15 to 8 Availability Register (0X6A7)
74
USB3.0 Port 15 to 8 Availability Register (0X6A8)
74
Display Availability Register (0X6A9)
74
VGA Display Availability Register (0X6Aa)
74
DVI/HDMI Display Availability Register (0X6Ab)
74
Display-Port Display Availability Register (0X6Ac)
74
Ancillary/Audio Availability Register (0X6Ad)
75
Front Panel Configuration Register (0X6Ae)
75
SSD Availability Register (0X6B1)
75
SSD Secure Hardware Erase Capability Register (0X6B2)
76
UART Enable Register (0X6B8)
76
COM Port Enable Register (0X6Bb)
76
COM Port Mode Register (0X6Bc)
77
COM Port RS485 Auto Direction Control Register (0X6Bd)
77
COM Port Loopback Enable Register (0X6Be)
77
SSD Erase Control Register (0X6Bf)
78
SSD Cache Flush Control Register (0X6C0)
78
VPX Control Register (0X6C1)
78
Scratchpad Register (0X6C6)
78
Test Register (0X6C7)
79
Backplane Status Register (0X6Ca)
79
SSD Status Register (0X6Cb)
79
Write Protection Status Register (0X6Cc)
80
Board Jumper Link Status Register (0X6Cd)
80
Boot Location Status Register (0X6Ce)
81
7 Connectors
82
Figure 7-1 Front Connector Positions and Numbering
82
Figure 7-2 Rear Connector Position and Numbering
82
Table 7-1 Connector Functions
82
Backplane Connectors (VPX)
83
P0 Connector
83
Backplane J0
83
Table 7-2 P0 Pin Assignments
83
Table 7-3 J0 Pin Assignments
83
P1 Pin Assignments (I/O Product Option E = 0)
84
Table 7-4 P1 Pin Assignments
84
J1 Pinout (I/O Product Option E = 0)
85
Table 7-5 J1 Pin Assignments
85
P2 Pin Assignments (I/O Product Option E = 0)
86
Table 7-6 P2 Pin Assignments
86
J2 Pinout (I/O Product Option E = 0)
87
Table 7-7 J2 Pin Assignments
87
P1 Pin Assignments (I/O Product Option E = 1)
88
Table 7-8 P1 Pin Assignments
88
Backplane J1 Pinout (I/O Product Option E = 1)
89
Table 7-9 J1 Pin Assignments
89
P2 Pin Assignments (I/O Product Option E = 1)
90
Table 7-10 P2 Pin Assignments
90
Backplane J2 Pinout (I/O Product Option E = 1)
91
Table 7-11 J2 Pin Assignments
91
Signal Descriptions
92
Table 7-12 Backplane Connector Signal Descriptions
92
Figure 7-3 RS422/485 Signal Definition
93
P5 Connector (TAC)
94
A • Specifications
95
Technical Specification
95
Table A-1 Technical Data
95
Electrical Specification
96
Voltage Supply Requirements
96
Current Consumption
96
Table A-2 Voltage Supply Requirements
96
Table A-3 Current Consumption - 3.3 V Rail (Vs2)
96
Table A-4 Current Consumption - 5 V Rail (Vs3)
96
3.3 V Auxiliary Supply
97
Mechanical Specification
97
Table A-5 Power Measurement Conditions
97
Table A-6 Current Consumption - P3V3_AUX
97
Table A-7 Current Consumption - VBAT
97
Table A-8 Mechanical Construction
97
Reliability (MTBF)
98
Table A-9 Reliability (MTBF)
98
Environmental Specifications
99
Convection-Cooled Boards
99
Conduction-Cooled Boards
99
Table A-10 Convection-Cooled Environmental Specifications
99
Table A-11 Conduction-Cooled Environmental Specifications
99
Product Codes
100
Table A-12 Product Options
100
Software Support
101
Bios
101
Built-In-Test
101
Background Condition Screening
101
I/O Modules
102
B • Statement of Volatility
103
Volatile Memory
103
Table B-1 Volatile Memory
103
Nonvolatile Memory
104
Table B-2 Nonvolatile Memory
104
C • Thermal Derating
105
Processor Option 1: Quad Core
105
Table C-1 Maximum Processor Speed Versus Maximum Temperature for Processor Option 1
105
Glossary
106
Index
108
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