Sony HCD-DZ500F Service Manual page 51

– MAIN Board –
IC101-107 CXD9775M
GND 1
PWM BP 2
GND 3
RESET 4
DREG RTN 5
DIGITAL
REGULATOR
GVDD 6
M3 7
DREG 8
DGND 9
M1 10
PROTECTION
M2 11
DVDD 12
SD 13
DGND 14
OTW 15
GND 16
PWM AP 17
GND 18
IC108, 109, 110 CXD9843AR
48 47 46
PWM
Clock Generator
(Secondary Clock System)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
GVDD
DVDD DREG DREG
PWM
RECEIVER
TIMING
CONTROL
DGND
&
PROTECTION
DREG
GVDD
DREG
LOGIC
OT
&
UVP
TIMING
CONTROL
DVDD DREG
&
PROTECTION
PWM
RECEIVER
DGND DREG
GVDD
45 44 43 42 41 40 39 38 37
Liner
∆ ∑ Converter
Gain
Interpolator
Control
INIT/MUTE
36 GVDD B
35 GVDD B
34 GND
33 BST B
OCH
32 PVDD B
GATE
31 PVDD B
DRIVE
30 OUT B
29 OUT B
28 GND
GATE
DRIVE
OCL
OCL
GATE
DRIVE
27 GND
26 OUT A
25 OUT A
GATE
24 PVDD A
DRIVE
23 PVDD A
OCH
22 BST A
21 GND
20 GVDD A
19 GVDD A
Sampling Rate
Converter
Filter
&
DF2
DF1
LOW
CUT
Filter
Clock Generator
(Primary Clock System)
Serial Control
21 22 23 24 25 26 27 28 29
HCD-DZ500F
S P
36 XFSIIN
35
DVDD
34 TEST
33 BFVSS
32 BFVDD
30 31
51