Pioneer DVR-520H-S Service Manual page 133

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(6) External ROM connection pins
QQ
3 7 63 1515 0
(a) Flash ROM interface pins
No.
196, 194-189,
D [15 : 0]
186-178
175, 174, 172,
171, 169-167, A [17 : 1]
165-156
176 RDZ
177 WRZ
(b) EEPROM interface pins
No.
145 SO
146 SI
147 SCK
151 SCS
(7) Clock and reset pins
No.
TE
L 13942296513
1 RESETB
202 HS_CLK
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Pin Name I/O
External ROM data bus
I/O Data bus in the external ROM access.
Process of pull-up or pull down is necessary.
External ROM address bus
O Address bus in the external ROM access.
Can addressing the 256k byte space.
ROM read
O Strobe signal which shows a read cycle for external ROM.
It becomes the inactive in the idle state.
ROM write
O
Strobe signal which shows a write cycle for external ROM.
Pin Name I/O
I/O Serial transmit data output of clock-synchronous system serial interface (CSI)
I/O Serial receive data input of clock-synchronous system serial interface (CSI)
I/O Clock output of clock-synchronous system serial interface (CSI)
I/O Chip select output of clock-synchronous system serial interface (CSI)
Pin Name I/O
Reset
RESETB input is asynchronous input. When a signal of fixed low-level width is input
I
without relation to an operation clock, take precedence of all operation, and reset the
system. Note: RESETB is low-active.
Host clock
Clock input pin which is supplied to CPU core and built-in peripheral I/O.
I
Please input 27 MHz clock. Perform 2 multiply with internal PLL by 27 MHz clock, 54
MHz clock is supplied to CPU core and internal peripheral I/O.
x ao
y
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Function
Function
Function
Q Q
3 6 7 1 3
u163
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DVR-520H-S
6
7
2 9 9 4 2 8
1 5 0 5 8 2 9 9 4
m
co
7
8
9 9
Active
A
−
−
L
L
B
Active
−
−
−
−
C
Active
2 8 9 9
L
−
D
E
F
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