Pioneer DVR-520H-S Service Manual page 131

5
(3) Audio interface pins
QQ
3 7 63 1515 0
No.
104 AMCLK48
103 AMCLK44
101 AMCLKO
96 PCM1
97 PCM2
98 AEMP1
93 ALRCK
94 ABCK
49, 48 AFS [2 : 1]
102 APWM
(4) SDRAM interface pins
TE
L 13942296513
No.
77 MCLK
76 MRAS
75 MCAS
74 MWE
92, 90-83,
MA [ 11 : 0]
81-79
73-69, 66-64,
MD [ 15 : 0]
62-57, 55, 54
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Pin Name I/O
I Audio master clock input for sampling frequency 48 kHz
I Audio master clock input for sampling frequency 44 kHz
O Audio master clock output
Audio PCM serial data
At 2ch : System 1 (data of audio block 1)
I/O At 4ch : System 1
The above is default setting value. Input/output data of PCM 1 and PCM 2 is replaced
by Channel swap setting of an AUDIO_FUNC register.
Audio PCM serial data
At 2ch : Mute
At 4ch : System 2 (data of audio block 2)
I/O
The above is default setting value. Input/output data of PCM 1 and PCM 2 is replaced
by Channel swap setting of an AUDIO_FUNC register.
Note: Cannot use it in DV decode.
O PCM1 emphasis ON/OFF in PCM 1 output
Audio LR clock
I/O L ch : High
R ch : Low
I/O Audio bit clock
Audio sampling frequency
O 44.1 kHz
48 kHz
32 kHz
O PWM signal for audio PLL
Pin Name I/O
O CLK pin connection of SDRAM
O RAS pin connection of SDRAM
O CAS pin connection of SDRAM
O WE pin connection of SDRAM
O Address pin connection of SDRAM
Data pin connection of SDRAM
I/O Note: Process of pull-up or pull down is necessary.
So connect it to SDRAM directly.
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6
8
Function
AFS2 AFS1
0 1
0 0
1 0
Q Q
3 6 7 1 3
Function
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DVR-520H-S
6
7
2 9 9 4 2 8
1 5 0 5 8 2 9 9 4
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co
7
8
9 9
Active
−
A
−
−
−
−
B
H
−
−
−
C
−
2 8 9 9
Active
−
−
−
−
D
−
−
E
F
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