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PCM1791ADBR (IC 71)
LRCK
1
BCK
2
DATA
3
MUTE
4
SCK
5
RST
6
V
7
DD
DGND
8
AGNDF
9
V
R
10
CC
AGNDR
11
V
R-
12
OUT
V
R+
13
OUT
V
14
COM
TERMINAL
NAME
PIN
TE
AGNDC
16
L 13942296513
AGNDF
9
AGNDL
19
AGNDR
11
BCK
2
DATA
3
DGND
8
LRCK
1
MC
27
MDI
26
MDO
25
MS
28
MSEL
24
MUTE
4
RST
6
SCK
5
V CC C
15
V CC F
21
V CC L
20
V CC R
10
V COM
14
V DD
7
V OUT L+
17
V OUT L–
18
V OUT R+
13
V OUT R–
12
ZEROL
23
www
ZEROR
22
(1) Schmitt-trigger input, 5-V tolerant
(2) Schmitt-trigger input and output. 5-V tolerant input. In I 2 C mode, this pin becomes an open-drain 3-state output; otherwise, this pin is a CMOS
output.
(3) 3-state output
.
(4) Schmitt-trigger input and output. 5-V tolerant input and CMOS output
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FUNCTIONAL BLOCK DIAGRAM
28
MS
27
MC
LRCK
26
MDI
BCK
25
MDO
DATA
MSEL
24
23
ZEROL
22
ZEROR
V
F
21
CC
MUTE
20
V
L
CC
RST
19
AGNDL
MSEL
18
V
L-
OUT
V
L+
17
OUT
AGNDC
16
MDO
15
V
C
CC
MDI
MC
MS
ZEROL
ZEROR
Terminal Functions
I/O
I/O
-
Analog ground (internal bias and current DAC)
-
Analog ground (DACFF)
-
Analog ground (L-channel I/V)
-
Analog ground (R-channel I/V)
Bit clock input (1)
I
Serial audio data input (1)
I
-
Digital ground
Left and right clock (f S ) input (1)
I
Mode control clock input (1)
I
Mode control data input (2)
I/O
Mode control readback data output (3)
O
Mode control chip select input (4)
I/O
I 2 C/SPI select (1)
I
Analog output mute control (1)
I
Reset (1)
I
System clock input (1)
I
-
Analog power supply (internal bias and current DAC), 5 V
-
Analog power supply (DACFF), 5 V
-
Analog power supply (L-channel I/V), 5 V
-
Analog power supply (R-channel I/V), 5 V
-
Internal bias decoupling pin
-
Digital power supply, 3.3 V
O
L-channel analog voltage output +
O
L-channel analog voltage output –
O
R-channel analog voltage output +
O
R-channel analog voltage output –
O
Zero flag for L-channel
O
Zero flag for R-channel
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2 9
8
Audio
Data Input
I/F
x 8
Oversampling
Advanced
Digital
Segment
Filter
DAC
and
Modulator
Function
Control
Function
Control
I/F
System
Zero
Clock
Detect
Manager
DESCRIPTIONS
DESCRIPTIONS
Q Q
3
6 7
1 3
1 5
co
.
35
DCD-500AE
9 4
2 8
Current
V OUT L-
Segment
DAC
V OUT L+
and
I/V Buffer
D/S and Filter
Bias
V COM
and
Vref
Current
V OUT R+
Segment
DAC
V OUT R-
and
I/V Buffer
D/S and Filter
Power Supply
0 5
8
2 9
9 4
2 8
m
9 9
9 9
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