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Denon DCD-500AE Service Manual page 32

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3 7 63 1515 0
TC94A14FAG (IC 53)
DV
49
SS3
RO
50
DV
51
DD3
DVR
52
LO
53
DV
54
SS3
ZDET
55
V
56
SS5
BUS0
57
BUS1
58
BUS2
59
BUS3
60
BUCK
61
/CCE
62
TE
L 13942296513
/RST
63
V
64
DD5
Pin Functions
Pin No.
1
B
2
LRCK
3
A OUT
4
DOUT
5
I
6
V
www
7
V
8
S BOK
.
9
CLCK
10
DA TA
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48
47
46
45
44
43
Clock
generator
LPF
1-bit
DAC
Audio out
circuit
Micro-
controller
interface
1
2
3
4
5
Symbol
I/O
O
CK
Bit clock output pin. 32fs, 48fs, or 64fs selectable by command.
3-5I/F
O
L/R channel clock output pin. "L" for L channel and "H" for R
3-5I/F
channel. Output polarity can be inverted by command.
O
Audio data output pin. MSB-first or LSB-first selectable by
3-5I/F
command.
O
Digital data output pin. Outputs up to double-speed playback.
3-5I/F
O
Correction flag output pin. When set to "H", AOUT output cannot
PF
3-5I/F
be corrected by C2 correction processing.
Digital 3.3 V power supply voltage pin.
DD3
Digital GND pin.
SS3
x
ao
O
Subcode Q data CRCC result output pin. "H" level when result is
y
3-5I/F
OK.
i
I/O
Subcode P-W data read clock I/O pin. I/O polarity selectable by
3-5I/F
command.
O
Subcode P-W data output pin.
3-5I/F
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8
42
41
40
39
38
PWM
Servo control
ROM
Digital equalizer
Address
circuit
RAM
adjustment circuit
CLV servo
16 k
RAM
Synchronous
guarantee
EFM
decoder
Digital output
Q Q
Sub code
3
6 7
1 3
decoder
6
7
8
9
10
11
Function Description
u163
.
32
2 9
9 4
2 8
37
36
35
34
33
D/A
A/D
automatic
Data
slicer
VCO
PLL
1 5
0 5
8
2 9
9 4
TMAX
12
13
14
15
16
Remarks
Normal speed:
32fs
1.4112 MHz
Normal speed: 44.1 kHz
Based on CP-1201
Alias: C2PO
m
co
Schmitt input
DCD-500AE
9 9
32
TEZI
31
TEI
30
SBAD
29
FEI
28
RFRP
27
RFZI
26
RFCT
25
AV
DD3
24
RFI
23
SLCO
22
AV
SS3
21
VCOF
PV
20
REF
19
LPFO
2 8
9 9
18
LPFN
17
TMAX

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