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X10DRX Motherboard User's Manual
IPMB
A System Management Bus (SMB)
header for IPMI 2.0 is located at JIPMB1.
Connect the appropriate cable here to
use the IPMB I
system.
I-SGPIO1/2 & S-SGPIO1 Headers
Three SGPIO (Serial-Link General Pur-
pose Input/Output) headers are located
on the motherboard. I-SGPIO1/2 support
onboard I-SATA 0-5, and S-SGPIO sup-
ports S-SATA 0-3 connections. See the
tables on the right for more information.
BMC CTRL
BMC FWR
A
X10DRX
Rev. 100
BIOS
JBAT1
Battery
JBT1
PCH
D
C
B
USB 6 (3.0)
S-SATA2
S-SATA1
S-SATA0
USB 2/3 (2.0)
FANB
Front CTRL Panel
C connection on your
2
UID-SW
VGA
JUIDB1
UID-LED
LED1
FANC
LAN CTRL
LEM1
CPU1
SP1
JVR1
Pin#
1
2
3
4
I-SGPIO1/2 & S-SGPIO1 Headers
Pin# Definition
1
NC
3
Ground
5
Load
7
Clock
Note: NC= No Connection
I-SGPIO1/2 & S-SGPIO1 Support
I-SGPIO & S-SGPIO Support
I-SGPIO1
I-SGPIO2
S-SGPIO1
IPMI LAN
COM1
LAN2
LAN1
USB 0/1 (2.0)
USB 4/5 (3.0)
FAN4
FAN5
CPU2
FAN7
CPU2
FAN6
CPU1
2-30
IPMB Header
Pin Definitions
Definition
Data
Ground
Clock
No Connection
Pin Definitions
Pin
Definition
2
NC
4
Data
6
Ground
8
NC
Supports I-SATA0-3
Supports I-SATA4/5
Supports S-SATA0-3
A. JIPMB1
B. I-SGPIO1
C. I-SGPIO2
D. S-SGPIO1
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