Philips L05HD Training Manual page 18

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AV1, AV2, CVI (480i), Side, and Tuner selections are made by the Hercules chip. Selected
CVBS (Composite Video) from one of these inputs is fed to the Trident panel which selects
between the output of the Hercules, CVI (480p, 720p, 1080i), and the HDMI panel. The CVI
input is shared by the Hercules and the HD section.
The L05HD has the following inputs in addition to the tuner RF:
·
AV1 is a Composite video input.
·
CVI (Component Video input) can accept 480i, 480p, 720p, or 1080i.
·
AV2 accepts Composite video (CVBS) or S-Video.
·
Side accepts Composite video (CVBS) or S-Video.
·
HDMI (High Definition Multimedia Interface) accepts 480p, 720p, or 1080i video and
audio in a digital TMDS format.
Detailed Signal flow (Figure 9)
The output of the Tuner is fed to the SAW filter, 1002, and then to 7200, Hercules, on Pins
104 and 105. The SVHS (YC) signals are combined inside 7200. IC 7200 selects between
AV1, AV2, Side, and Tuner composite video. The selected composite video is output on Pin
65. Video buffered by Transistor 7211 is fed to IC 7206 located on the Trident panel which
extracts Closed Caption text and Teletext information. This IC also generates the OSD (On
Screen Display). Video buffered by 7212 is fed to the Trident IC which has an internal 3-D
Comb Filter and A/D converter. IC 7201 rescales the picture to 1080i.
Component video is inserted into the YPbPr input located on the Family board. The HDMI
panel converts the HDMI signal into an analog YPbPr format. Both of these signals are fed to
the Switch, 7205 which selects between the two. The selected signal is fed to IC 7210 which
performs an A/D conversion. This 24 bit signal is fed to 7201. The Scaler (Trident IC) con-
verts the signal to a 1080i format as well as performing picture enhancement functions.
DRAM ICs 7215, 7216, 7217, and 7218 stores picture data for the Scaler as it is being
processed. And internal D/A conversion circuit outputs the 1080i signal is an RGB format on
Pins 27, 28 and 29. Horizontal and Vertical sync is output on Pins 34 and 35.
The RGB signal from the Scaler is fed to the TV Display Processor, 7221. RGB is output
from this IC to the CRT panel. Horizontal and Vertical drive is output to the Family board.
TV Display Processor (Refer to Figure 5)
IC 7221 is used in a large number of Philips chassis for a long period of time. RGB in insert-
ed in Pins 30, 31, and 32. This signals are converted to a YUV format before being fed to the
Color level control. RGB from 7206 is inserted on Pins 35, 36, 37, and 38. The signal then
goes to a Brightness and Controls control circuit. RGB to the CRT panel is output on Pins
40, 41, and 42. During warm up, a cathode calibration signal is fed to the CRT panel on the
RGB lines. This signal is then fed back to
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