Pci Express - Digilent NetFPGA-1G-CML Reference Manual

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NetFPGA-1G-CML™ Board Reference Manual

PCI Express

Port Name
IO Location
NET pcie-rx0_p
LOC = H2;
NET pcie-tx0_p
LOC = J4;
NET pcie-rx0_n
LOC = H1;
NET pcie-tx0_n
LOC = J3;
NET pcie-rx1_p
LOC = K2;
NET pcie-tx1_p
LOC = L4;
NET pcie-rx1_n
LOC = K1;
NET pcie-tx1_n
LOC = L3;
NET pcie-rx2_p
LOC = M2;
NET pcie-tx2_p
LOC = N4;
NET pcie-rx2_n
LOC = M1;
NET pcie-tx2_n
LOC = N3;
NET pcie-rx3_p
LOC = P2;
NET pcie-tx3_p
LOC = R4;
NET pcie-rx3_n
LOC = P1;
NET pcie-tx3_n
LOC = R3;
NET pcie-clk_p
LOC = H6;
NET pcie-clk_n
LOC = H5;
NET pcie-perstn
LOC = L17
NET pcie-wake
LOC = K18
NET pcie-prsnt
LOC = AA7
Ethernet PHYS
Port Name
NET mdc
NET mdio
NET phy_rstn_1
NET phy_rstn_2
NET phy_rstn_3
NET phy_rstn_4
NET phy_intrn_1
NET phy_intrn_2
NET phy_intrn_3
NET phy_intrn_4
NET rgmii_rxd_1[0]
NET rgmii_rxd_1[1]
NET rgmii_rxd_1[2]
Copyright Digilent, Inc. All rights reserved.
Other product and company names mentioned may be trademarks of their respective owners.
IO Standard Type
IOSTANDARD = LVCMOS33
IOSTANDARD = LVCMOS33;
IOSTANDARD = LVCMOS18;
IO Location
IO Standard Type
LOC = V13
IOSTANDARD = LVCMOS18;
LOC = W13
IOSTANDARD = LVCMOS18;
LOC = K21
IOSTANDARD = LVCMOS33;
LOC = L23
IOSTANDARD = LVCMOS33;
LOC = E25
IOSTANDARD = LVCMOS33;
LOC = D18
IOSTANDARD = LVCMOS33;
LOC = J8
IOSTANDARD = LVCMOS18
LOC = J14
IOSTANDARD = LVCMOS18
LOC = K15
IOSTANDARD = LVCMOS18
LOC = M16
IOSTANDARD = LVCMOS18
LOC = A14
IOSTANDARD = LVCMOS18;
LOC = B14
IOSTANDARD = LVCMOS18;
LOC = E12
IOSTANDARD = LVCMOS18;
PULLUP
NODELAY;
PULLUP;
PULLUP;
PULLUP;
PULLUP;
Page 16 of 21

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