Appendix B: Fpga Pin Constraints - Digilent NetFPGA-1G-CML Reference Manual

NetFPGA-1G-CML™ Board Reference Manual

Appendix B: FPGA Pin Constraints

The following list provides LOC and IOSTANDARD constraints for the main peripheral pins connected to the FPGA.
This information can be used in a design UCF file with Xilinx ISE Design Suite, a design XDC file with Xilinx Vivado
Design Suite, or with various interface generators included with Xilinx Coregen and MIG. Please see the Xilinx
Constraints Guide (UG625) for ISE Design Suite based designs and Xilinx Vivado Design Suite User Guide: Using
Constraints (UG903) for Vivado based designs.
Depending upon the design suite selected, this information can be expressed in either a UCF file or an XDC file as
follows:
UCF format used with ISE Design Suite
NET <port name> LOC=<io location> | IOSTANDARD=<io standard type>;
XDC format used with Vivado Design Suite
set_property IOSTANDARD <io standard type> [get_ports { <port list> }]
set_property LOC <io location> [get_ports <port name>]
The information is presented in UCF format to express a clear association between the pin and the desired IO
standard for the NetFPGA-1G, although it can be readily translated into the XDC format. LOC information is
provided here for all pins. IOSTANDARD information is provided for SelectIO pins. Other useful properties are
suggested where appropriate.
System Clock and Reset
Port Name
NET reset
NET system_clk_p
NET system_clk_n
DDR3 SDRAM
Port Name
NET ddr3_dq[0]
NET ddr3_dq[1]
NET ddr3_dq[2]
NET ddr3_dq[3]
NET ddr3_dq[4]
NET ddr3_dq[5]
NET ddr3_dq[6]
NET ddr3_dq[7]
NET ddr3_addr[0]
NET ddr3_addr[1]
NET ddr3_addr[2]
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IO Location
IOSTANDARD=LVCMOS18; # RESET
LOC = AA8
button (BTN4)
LOC = AA3 IOSTANDARD=LVDS;
LOC = AA2 IOSTANDARD=LVDS;
IO Location
LOC = AE5 IOSTANDARD = SSTL15_T_DCI;
LOC = AE3 IOSTANDARD = SSTL15_T_DCI;
LOC = AD4 IOSTANDARD = SSTL15_T_DCI;
LOC = AF3 IOSTANDARD = SSTL15_T_DCI;
LOC = AE1 IOSTANDARD = SSTL15_T_DCI;
LOC = AF2 IOSTANDARD = SSTL15_T_DCI;
LOC = AD1 IOSTANDARD = SSTL15_T_DCI;
LOC = AE2 IOSTANDARD = SSTL15_T_DCI;
LOC = Y3 IOSTANDARD = SSTL15;
LOC = Y2 IOSTANDARD = SSTL15;
LOC = W3 IOSTANDARD = SSTL15;
IO Standard Type
IO Standard Type
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