Sony CDX-C90 Service Manual page 64

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3 7 63 1515 0
IC1 CXD8679Q (MAIN BOARD)
51 50
IF SELD 52
IF SELC 53
NC 54
SBCKI 55
4BIT DATA
SDATAR 56
BITSTREAM
SDATAL 57
NC 58
DFDTOL 59
DFBCKO 60
DFDTEN 61
TEST1 62
TEST2 63
VSS 64
TE
L 13942296513
1 2
IC3, 4 PCM1702U-J (MAIN BOARD)
INPUT
1
DATA
INTERFACE
&
CLOCK 2
SINE CONVERTER
CIRCUIT
3
NC
4
+VDD
BALANCED
D.COM 5 CURRENT
SEGMENT
6 DAC A
–VDD
7
L.E
NC 8
9
NC
10
NC
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49 48 47 46 45
ATT
MODE
IIR
FIR 4
FIR 1 FIR 2 FIR 3
OVERFLOW DETECTOR
P/S CONVERT
&
D/F-CLK GEN.
DATA SELECT
4
3 5 6 7
20 –VCC
REFERENCE
19 REF DC
&
SERVO CIRCUIT
18 NC
17 SERVO DC
BALANCED
BY-POLR
CURRENT 16 A.COM
OFFSET
SEGMENT
CIRCUIT
DAC B 15 A.COM
14 I OUT
13 NC
12 BPO DC
11 +VCC
x ao
y
i
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8
44 43 42 41 40
TIMING
CIRCUIT
S / P
ATT
IIR
FIR 4
FIR 1 FIR 2 FIR 3
OVERFLOW DETECTOR
Q Q
3 6 7 1 3
2
12
8 9 10 11
ZCEN
SDATAI
DGND
SCLK
SDATAO
MUTE
u163
.
– 93 –
2 9 9 4 2 8
39 38 37 36 35
OR
"0" DETECT
MUTE
CIRCUIT
3rd order
L . I . P.
NOISE
SHAPER
ATT
x 0.75
DITHER
ATT
x 0.75
3rd order
L . I . P. NOISE
SHAPER
POLALITY
CLOCK
GENERATOR
1 5 0 5 8 2 9 9 4
DATA SELECT
13
14 15 16 17
IC103, 104 CS3310-KSR
MUX
+
–
1
8 8
2
CS
CONTROL
3
REGISTER
VD+ 4
16
5
SERIAL
6 PARALLEL 8 8 8
REGISTER
7
8
MUX
m
co
9 9
34 33
32 INAF
31 OVFLAG
30 MUTER
29 MUTEL
28
MTPOL
27
DRPOL
26 MODE
25 NC
24 DFDTOR
23 DFLRCKO
22
TEST4
21 TEST3
20
VSS
2 8 9 9
18 19
16 AINL
15 AGNDL
14 AOUTL
13 VA–
12 VA+
11
AOUTR
10
AGNDR
9 AINR