Block Diagrams; Pin Diagram - Denon DVD-3910 Service Manual

QQ
3 7 63 1515 0
FLI2310 (SY: IC718)

Block Diagrams

Port 2
8-bit
Input Processor
656 Input
with Auto Sync
and auto Adjust
Port 1
8/16/24-bit
RGB/YCrCb
Input
Clock
Generation
PLLs

Pin Diagram

1
HSYNC1_PORT1
TE VSYNC1_PORT1
L 13942296513
FIELD ID1_PORT1
IN_CLK1_PORT1
HSYNC2_PORT1 5
VSYNC2_PORT1
FIELD ID2_PORT1
VDD1
VSS
1 0
IN_CLK2_PORT1
B/Cb/D1_0
B/Cb/D1_1
B/Cb/D1_2
B/Cb/D1_3
B/Cb/D1_4 1 5
VDDcore1
VSScore
B/Cb/D1_5
B/Cb/D1_6
B/Cb/D1_7 2 0
R/Cr/Cb Cr_0
R/Cr/Cb Cr_1
R/Cr/Cb Cr_2
R/Cr/Cb Cr_3
R/Cr/Cb Cr_4 2 5
R/Cr/Cb Cr_5
R/Cr/Cb Cr_6
R/Cr/Cb Cr_7
G/Y/Y_0
VDD2 3 0
VSS
G/Y/Y_1
G/Y/Y_2
G/Y/Y_3
G/Y/Y_4 3 5
VDDcore2
VSScore
G/Y/Y_5
G/Y/Y_6
G/Y/Y_7 4 0
IN_SEL
TEST
DEV_ADDR1
DEV_ADDR0
4 5
SCLK
SDATA
RESET_N
VDD3
VSS
SDRAM DATA(0) 5 0
SDRAM DATA(1)
SDRAM DATA(2)
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Noise Reducer,
Deinterlacer, Frame
Rate Converter and
SDRAM interface
2Mx32
SDRAM
(external)
x ao u163
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http://www.xiaoyu163.com
2 9
8
Vertical and
Horizontal
Scalers
Vertical and
Horizontal
Enhancers
Q Q
3 6 7 1 3 1 5
co
.
51
DVD-3910
9 4 2 8
Output
Processor
16/20/24-bit
RBG/YCrCb
Digital Outputs
OE
1 5 5 G/Y/Y_OUT_7
0 5 8 2 9 9 4 2 8
G/Y/Y_OUT_6
G/Y/Y_OUT_5
G/Y/Y_OUT_4
G/Y/Y_OUT_3
1 5 0 G/Y/Y_OUT_2
G/Y/Y_OUT_1
G/Y/Y_OUT_0
VSS
VDD8
1 4 5 R/V/Pr_OUT_7
R/V/Pr_OUT_6
R/V/Pr_OUT_5
R/V/Pr_OUT_4
R/V/Pr_OUT_3
1 4 0 R/V/Pr_OUT_2
VSScore
VDDcore7
R/V/Pr_OUT_1
R/V/Pr_OUT_0
1 3 5 B/U/Pb_OUT_7
B/U/Pb_OUT_6
B/U/Pb_OUT_5
B/U/Pb_OUT_4
B/U/Pb_OUT_3
1 3 0
B/U/Pb_OUT_2
VSS
VDD7
B/U/Pb_OUT_1
B/U/Pb_OUT_0
CLKOUT
1 2 5
VSScore
VDDcore6
CTLOUT4
CTLOUT3
1 2 0 CTLOUT2
CTLOUT1
CTLOUT0
TEST OUT1
TEST OUT0
1 1 5 TEST3
SDRAM CLKIN
VSS
VDD6
SDRAM CLKOUT
1 1 0
SDRAM DQM
SDRAM CSN
SDRAM BA0
SDRAM BA1
SDRAM CASN
1 0 5 SDRAM RASN
m
9 9
9 9