Yamaha RX-V461 Service Manual page 43

A B C
RX-V461/HTR-6040/DSP-AX461
DSP 2/6
1
2
3
4
5
to DSP 5/6
to DSP 1/6
6
7
8
9
# All voltages are measured with a 10MΩ/V DC electronic voltmeter.
# Components having special characteristics are marked s and must be replaced
with parts having specifications equal to those originally installed.
# Schematic diagram is subject to change without notice.
10
70
D E F
3.3
3.3
3.3 IC203
0
3.3
3.3 IC203
0
0
FLASH ROM
0 0
0 3.3
0 0
2.7 2.5
0.7 0.4
0.7 2.2
1.8 0.4
1.9 2.3
0 0.4
2.3
3.3 0.4
3.3 3.3
2.2
0.4
0 2.0
0 0.4
0.3 2.0
1.8 0.3
1.8 2.1
1.7 0
1.7 3.3
0
1.9
1.9 3.3
3.0 1.0
IC201: S29AL008D70TFI0
8 M-bit (1 M x 8-bit/512 K x 16-bit) COMS 3.0 volt-only boot sector flash memory
A15 1
DQ0–DQ15 (A-1) A14 2
RY/BY#
A13 3
V CC
A12 4
Selector Switches
V
S S A11 5
A10 6
Erase Voltage
Input/Output A9 7
RESET#
Generator Buffers
A8 8
NC 9
NC 10
WE# 11
WE# State 12
RESET#
Control
NC 13
BYTE#
NC 14
Command
Register RY/BY# 15
PGM Voltage A18 16
Generator
A17 17
Data A7 18
Chip Enable
Output Enable STB Latch A6 19
CE#
20
Logic A5
OE# A4 21
A3 22
A2 23
A1 24
Y-Decoder Y-Gat ing
STB
V CC Detector Timer
Cell Matrix
X-Decoder
A0–A18
G H I
to DSP 1/6
SDRAM
2.5 3.3
2.2 3.3
3.3
2.3
2.3 3.3
2.2 3.3
3.3
2.0
2.0 3.3
2.1 0
0.4 0
0.4 0 EXTENDED PORT
0.4 0
0.4 0
0.4 0
0.4 0
0.3
0
0
0.3
0.7
1.1
3.3
1.8
0 3.3
0
1.9
0 3.3
1.8
0.3 3.3
3.2
1.8
0.4 3.3
3.3
1.7
0.4 3.3
3.3
1.7
0.4 3.3
3.3
1.9
0.4 1.7
1.9
0.4 1.7
1.8
3.0
0.4 3.3
3.4
1 .0
0
0
0 3.3
2.1 0
2.0 0
2.0 3.3
2.2 3.3
2.3 0
2.3 0
2.2 3.3
2.5 0
0
0
0 3.3
0
0
0.3 3.3
0.4 0
0.4 3.3
0
0.4
0.4 3.3
0.4 0
0.4 3.3
0 0
0 3.3
2.1 0
3.3
2.0
2.0 3.3
2.2 0
2.3 3.3
2.3 3.3
2.2 3.3
2.5 0
0
0
IC202: W9864G6EH
1 M x 4 banks x 16-bit SDRAM
48 A16
47 BYTE# CLK
CLOCK
46 V SS BUFFER
45 DQ15/A-1
CKE
44
DQ7
43 DQ14
42 DQ6
CS
41 DQ13
RAS
40 DQ5
39 DQ12 CAS
38 DQ4 COLUMN DECODER
WE
V
37 CC
36
DQ11
35 DQ3 CELL ARRAY
A10 BANK #0
34 DQ10
33 DQ2
MODE
A0
32 DQ9 REGISTER
SENSE AMPLIFIER
31 DQ1 A9
A11
30 DQ8 BS0
BS1
29 DQ0
28
OE#
27 V
SS
26 CE# DATA CONTROL
CIRCUIT
25 A0
REFRESH COLUMN
COUNTER COUNTER
COLUMN DECODER
CELL ARRAY
BANK #2
SENSE AMPLIFIER
J K L
to DSP 5/6
to DSP 1/6
to DSP 5/6
to DSP 4/6
to DSP 4/6
to DSP 3/6
to DSP 5/6
to DSP 4/6
to DSP 3/6, 4/6
to DSP 4/6
to DSP 6/6
to DSP 3/6, 4/6
to DSP 4/6
to DSP 5/6
to DSP 6/6
to DSP 3/6
IC203: SN74AHC02PWR IC204-207: SN74LV573APWR
Quadruple 2-input positive-NOR gates Octal 3-state D-latches with 3-state outputs
OE
1Y 1 14 Vcc
4Y
1A 2 13
LE
4B
1B 3 12
1D
2Y 4A
4 11
COLUMN DECODER
2A 3Y
5 10
2B 6 9 3B
CELL ARRAY
BANK #1
GND 7 8 3A
8D
SENSE AMPLIFIER
DQ0
DQ
BUFFER
DQ15
UDQM
LDQM
COLUMN DECODER
CELL ARRAY
BANK #3
SENSE AMPLIFIER
M N
to DSP 4/6
1
OE 1 20 V
CC
11 1D 2 19
1Q
2D 3 18 2Q
C1 19
3D 4 17
2 1Q 3Q
1D
4D 5 16 4Q
5D 6 15 5Q
6D 7 14
6Q
7D 8 13 7Q
8D 9 12 8Q
C8 12
GND 10 11 LE
8Q
9
8D