Gpio Direction Register; Gpio Output Register - GE SBC330 3U VPX Hardware Reference Manual

54 SBC330 3U VPX Single Board Computer

6.5.3 GPIO direction register

This register sets the direction of each individual bit.
A '1' in this register indicates that the I/O line is an output; a '0' indicates the line
is an input. At power up, the default FPGA code sets this register to 0x00, so the
I/O lines are all inputs.
If the GPIO lines are set up as inputs, they can be added into the Interrupt register
to act as interrupts. A bit in the Miscellaneous Functions register determines
whether the GPIO bits are seen as interrupts. The GPIO lines are masked in the
same way as the other interrupts.
Chip Select CS2
Offset 0x005C
Reset value 0x00
LAD Bit Reg Bit R/W
15 0 R/W
14 1 R/W
13 2 R/W
12 3 R/W
11 4 R/W
10 5 R/W
9 6 R/W
8 7 R/W

6.5.4 GPIO output register

Chip Select CS2
Offset 0x0060
Reset value 0x00
LAD Bit Reg Bit R/W
15 0 R/W
14 1 R/W
13 2 R/W
12 3 R/W
11 4 R/W
10 5 R/W
9 6 R/W
8 7 R/W
Description
GPIO(0) direction. '0' = Input, '1' = Output
GPIO(1) direction. '0' = Input, '1' = Output
GPIO(2) direction. '0' = Input, '1' = Output
GPIO(3) direction. '0' = Input, '1' = Output
GPIO(4) direction. '0' = Input, '1' = Output
GPIO(5) direction. '0' = Input, '1' = Output
GPIO(6) direction. '0' = Input, '1' = Output
GPIO(7) direction. '0' = Input, '1' = Output
Description
GPIO(0) output data
GPIO(1) output data
GPIO(2) output data
GPIO(3) output data
GPIO(4) output data
GPIO(5) output data
GPIO(6) output data
GPIO(7) output data
Publication No. SBC330-0HH/3