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A100
RX MID CHANNELS
PCS: CH 661 -- 1960MHz
1930-1990MHz
7
B
5
U102
FL401
4
EXT ANT
2
V2
SW_RF
V1
from J100
6
3
3
2
DCS_LNA275
V1
V2
U401
U104
SWITCH
CONTROL
8
1
4
5
6
1850-1910MHz
FL100
TX FRQ. RANGE
PCS:1850-1910MHz
B+
C
B C
C
B
B
Q378
Q384
Q389
GSM: 880-915Mhz
DCS: 1710-1785MHz
EXC
7
U350 PAC
RF_IN
DET
2
TX_EN
PAC_EN
Q507
SAT.
from U700
4, 14
10
12
8
11
GSM_LNA275
DCS_LNA275
RX_DCS_*GSM
GSM / DCS SELECT CIRCUIT
*TX_GSM_VCO
*TX_DCS_VCO
FILTERED_-10V
M3682 - BLOCK DIAGRAM - PAGE 2/2
RF_V2
PCS LNA
3
RX_EN
4
U504
MIX_275
2
1930-1990MHz
MIX_275
C
B
Q430
Q453
FL458
C
E
RX VCO MID CHANNELS
PCS: CH 661 -- 1560MHz
RX VCO FRQ. RANGE
PCS: 1530 - 1590MHz
VCO_VCC
CR330
C
C
B
B
Q333
Q318
C
PCS
B
Q311
C
1, 3
DETECT_SW
AOC_DRIVE
SAT_DETECT
TX_KEY_OUT
RX
Osc.
LOCAL
discrete
OSCILLATOR
circuty
Q262
CR259
SW_V1
B
C
Q480
FL457
C
400 MHz
SW_VCC
C
RF_V2
Q242
E
ALRT_VCC
E
RF_V1
Q240
C
VCO_VCC
from MAGIC
GP04
FILTER
4
3
SF_OUT
U506
RX_DCS_*GSM
2
RX VCO
CR201
CR201
VR201
C201
C201
Q201
Q421
SW_V1
Q202
DCS_SEL
TX VCO
TX LOOP
FILTER
VR309
*TX_DCS_VCO
DETECT_SW
AOC_DRIVE
SAT_DETECT
TX_KEY_OUT
64
800MHz
58
PLL
U201
1
MAGIC
( SCLK_OUT ) BCLKR
54
( SDFS ) BFSR
4
RX
RXI
STEP
53
DEMODULATION
ATT.
SPI
RXQ
( SDRX ) BDR
52
2
5, 24 ,27, 57
B
30
33
49, 50
32
PHASE
DET
Divider
28
200KHz
47
B
13MHz
14, 34
46, 61
MAGIC_13MHz
46
MUX
CLK_SELCT
21
Startup
Ref.
1 /2
25
17
PHASE
Prog.
19
DET
Divider
REF. OSC.
200KHz
15
26
26 MHz
Divider
REF.
PLL
AFC
48
( CE ) MQSPI_CS1
38
SPI
GP04
( SPI_CLK ) MOSPI_CLK1
56
LOGIC
37
INTER
CONTROL
( SPI_DATA ) DX1
36
FACE
( SDTX ) BDX
35
TX
TXI
MODULATION
( TX_CLK ) BCLKX
TXQ
SPI
44
9
RX_ACQ
51
7
DM_CS
LOGIC
39
PA
TX_KEY
CONTROL
CONTROL
40
13
8
RX SIGNAL PATH
TX SIGNAL PATH
MAIN VCO SIGNAL PATH
TUNING VOLTAGES
to WhiteCap
VRef
13MHz VCO
CR230
to WhiteCap
from WhiteCap
Y230
26MHz
from WhiteCap
from WhiteCap
REFERENCE CLOCK
Orderable Part
Non - Orderable Part
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