HP 3320A Operating And Service Manual page 160

Frequency
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Capacitor,
C3,
discharges
from + 10 V
to
+ 3.165 V at 9.99 dB down from maximum
output. Or, any time the BCD INPUTS to
All
~
000.
Amplitude
BCD
Capacitor
Setting
INPUTS
Discharge
+ 26.99
999
+ 10 V
+16.99
999
+ 10 V
+ 6.99
999
+ 10 V
3.01
999
+ 10 V
13.01
2.~
Bottom voltage with BCD INPUTS = 000 amplitude setting
of + 17.00 d Bm for 3320B with 50
n
output.
Amount of capacitor, C3, discharge (Delay) varies with
amplitude setting and may be observed with an oscilloscope:
1. At maximum amplitude setting and at all levels 10 dB
down from maximum amplitude, there 'is no discharge
and the capacitor remains at
+
10 V. Examples for 3320B
with 50
n
output:
For 3320B with 50
n
output:
+ 10.000 V dc ± .002 Vat + 16.99 dBm
+ 3.1659 V dc ± .0006 V at + 17.00 dBm
Top voltage with BCD INPUTS
~
999. amplitude setting of
+ 16.99 dBm for 3320B with 50
n
output.
. :~.;::~
,"
c c c ' 1 l ; i
.
:
,
NOTE 3: IC2, IC3 and IC4 are programmable decade counters. The
outputs are preset to any state (number) by placing a Iowan the
Count/Load input and parallel loading the desired data (BCD
INPUT number) on the Data Inputs. The outputs will change to
agree with the Data Inputs independently of the state of the clocks.
NOTE 4: IC6 and IC7 are connected to function as Monostable
Flip-Flops with positive edge triggering. The Q output on IC6 will
remain high for approximately 25 lJSec. The
a
output on IC7 will
remain
high for approximately 50 lJSec. Identical to Fairchild
Retriggerable Monostable Multivibrator 9601 .
TO XAII
All
hp
PorI No. O:n20·66511
RIY A
G
C3:J
;e
!
I
I
,
~ ~0
I
I
I
,
G
~
'Ie
~ ~
,
I
I
,
2
9
y
~
I
I
000000000000000
I
CO"_lloH
"
... (I_CUll
,
+26.99
·(·12.00)
3899
200
+26.99
·(+16.99)
1000
999
,"
200 = BCD inputs to All
9's complement
999
~
BCD inputs to All
9's complement of
last 3 digits.
max. amplitude
subtract amplitude setting
max. amplitude
subtract amplitude setting
Example with· dBm setting:
Example with
+
dBm setting:
SCHEMATIC
CONNECTOR
NUMBER
NUMBER
INSTRUMENT TYPE
2
XA21A
"B" Model - Standard,
Options 001 ,002,006
5
XA22A
"B" Model - Option 004
10
XA22A
"B" Model - Option 007
Voltage levels are:
H
~
+5 V
L = 0 V
The first digit (1
in these examples) controls the 10 dB step
attenuatar on the A 15 assembly (Schematic 17).
NOTE 1: The following table lists the schematic number and
mnnector
number
versus
instrument type
for controller board
interfacing:
NOTE 2: Logic Signal levels for BCD INPUTS are indicated by the
H preceding the BCD weighting. The H indicates the true state
(signal present).
The BCD I NPUTS to the All Assembly varies with amplitude
setting. The BCD INPUTS may be determined by subtracting the
maximum amplitude setting (+ 26.99 for 50
n
output) from the
amplitude setting and then taking the 9's complement of the last
three digits.
I
I
I
I
I
I
I
I
I

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