HP 3320A Operating And Service Manual page 121

OliTPuT PI~12 CON~£·:'[D
TO 'NPl" T PI~ I fOR
B'D
COUNT
POS,TlvE
"::lGIC
~TES
II~ • SIT TIIIIEBEFOR£
CLOCK PULSE
l.'"
+lotliT TIlliE AFTER
CI.OCK PULSE:
~_
Q
~
On "'EANS ()JTPUTS 00 NOT CHANGE
STATES WITH CLOCK PULSE
4.a.Qn~EANS OUTPUTS CHANGE ST4T"ES
WITH
C~OCK
PULSE
22
Z
LOW INPUT TO Cl£A1l SfTSO TO LOGICAL 0
CLEAR IS INDEPENO(NT OF CLOC'"
Local mode A Low, B High
Remote mode A High, BLow
NOTE 4: Local/Remote select lines from A24 Assembly:
NOTE 5: Logic Diagram of IC is shown below.
I COMPONENT 4749
2 CIRCUIT 4850
0000000000000000000000000
1 COMPONENT
A CIRCUIT
33Z0"-8-Z8~
[:
~<I~:
I
[
>~ ~I:
:
I
l:1~I:S:!
[:
:I~
I?:
l
[: ! C : I : O : [ [: :<1::
I
[::I~?:[
(: <1:4: I
[: !C:
1 :: I
[:)~~6:1
[:l
C
»:1
[:1:<7: :
1
t:)~ ~ :l [::1~~:1
t:
:C:l~:l t:'~:2~:1
[::I~~:l
[:
~i'?
:
l
[::<S::1
[:)s~:1
[: :lsi:l
-RII-
®
A
-RIO-
0000000000000000000000
POSITIVE LOGIC 'Y'{IAo'8°tC)+(IOO![oIF)
Z'I' (2Ao281
+
(2Co2DI
H Delay Flag - indicates the delay flag line should
be
+
5 V
when a delay flag signal is presento
L Data Valid - indicates the data valid line should be 0 V when
a data valid signal is present
°
2A 28 2C 2D 2Y
TOW2JI
Example:
In Local Mode (A Low, B High) the input on pins g and 10 is
Inverted and applied to pin 8. The input on pin 5 is inverted and
applied to pin 6.
NOTE 3: Logic diagram of IC is shown below.
NOTE 2: In Remote Mode (A High, B Low) the input on pins 12
and 13 is inverted and applied to pin 8. The input on pin 3 is
inverted and applied to pin 6.
TO XA23A
A23
hp
Par! No. 03320-66523
Rev B
NOTE 1: Logic signal levels are shown by the letters H or L NOTE 3: (CONT'D)
preceding the name of the line. The Hand L indicates the true state
(signal present). Voltage levels for the Hand L are:
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I