HP 3320A Operating And Service Manual page 102

Frequency
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Table 1. Data Bit Decoder.
ASCII
INPUT'
OUTPUT or
Character
b7
b6
b5
b4
b3
b2
bl
Preface Commands
0
0
1
1
X"
X
X
X
1
0
1
1
-
-
-
-
2
0
1
1
-
-
-
-
3
0
1
1
-
-
-
-
4
0
1
1
-
-
-
-
H Numerical No. Enable
5
0
1
1
-
-
-
-
(lC8 pin 1)
6
0
1
1
-
-
-
-
7
0
1
1
-
-
-
-
8
0
1
1
-
-
-
-
9
0
1
1
-
-
-
-
0
1
0
1
1
0
0
H Function Execute
(XA 38 pin 61
0
1
0
1
1
0
1
H - dBm (XA38 pin 7)
A
1
0
0
0
0
0
1
L Amplitude (XA38 pin C)
C
1
0
0
0
0
1
1
L Delay Initiate IXA38 pin SI
0
1
0
0
0
1
0
0
L Delay (XA38 pin 5)
F
1
0
0
0
1
1
0
L Frequency (XA38 pin 3)
I
1
0
0
1
0
0
1
H Local Enable {lCll pin 101
K
1
0
0
0
0
1
1
H Vernier In (XA38 pin 01
M
1
0
0
1
1
0
1
H Vernier Out (XA38 pin 4)
R
1
0
1
0
0
1
0
L RANGE (XA38 pin E)
V
1
0
1
0
1
1
0
L Vernier Digit (XA38 pin B)
*
Positive True.
** X
=
Don't Care.
NOTE
This
is a Functional Block Diagram of the GPI B and
BCD
Controller. The logic symbology shown is functional and may not
agree with the conventional Logic shown on schematics. Two or
more Logic gates may be combined into one gate on this diagram.
The circlets) on the inputs of the IC's indicates the logic level
required not necessarily inversion. The circle "0" indicates a low
logic level (0 V) required to perform the gate function.

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