Toshiba PORTEGE A600 Maintenance Manual page 70

2 Troubleshooting Procedures
System BIOS IRT processing
Debug
Code
F100
F101
F102
F103
F104
F105
F106
F107
2-24
Downloaded from LpManual.com Manuals
Table 2-5 Debug port error status (2/8)
BIOS processing
CPU setup
Initialization of ICH, MCH, and Super
I/O
setup of SD controller
setup of PIT
Memory initialization
Memory error
setup for using RAM area
check memory error of RAM area
memory error
CPU setup
CMOS setup
CMOS error
Resume branch
BIOS processing reading
ROM read error
check of BIOS processing
RAM setup
Initialization of ICH (APIC)
Initialization of ICH (PIT)
PIT initialization error
CPU check
check of ROM data
SMI setup
Part number data distinction
Panel distinction
CMOS check
Clock generator setup
CPU initialization
[CONFIDENTIAL]
2.4 System Board Troubleshooting
Target Device
CPU
ICH(PCIRegister,PITContro
ller)
MCH(PCIRegister)
SDController
BIOSROM
MCH(PCIRegister)
RAM(SPD,Memory)
ICH(PCIRegister,CMOS)
CPU
BIOSROM
CPU
ICH(CMOS)
BIOSROM
ICH(CMOS)
BIOSROM
RAM
EC/KBC(EC)
TPM
CPU
CPU
ICH(CMOS,PICController,I
/O,MEM I/O)
RAM
CPU
ICH(PITController,MEM
I/O,CMOS,I/O)
Clock Generator
PORTEGE A600 Maintenance Manual (960-710)
IC No.
IC1050(CPU)
IC1600(ICH)
IC1200(MCH)
IC2000(SDController)
IC3001(BIOS ROM)
IC1200(MCH)
IC1420,1421,1430,1431(RAM
)
IC1440,1441,1450,1451(RAM
)
CN1410(RAM Conn.)
IC1600(ICH)
IC1050(CPU)
IC3001(BIOS ROM)
IC1050(CPU)
IC1600(ICH)
IC3001(BIOS ROM)
IC1200(MCH)
IC3001(BIOS ROM)
IC1420,1421,1430,1431(RAM
)
IC1440,1441,1450,1451(RAM
)
CN1410(RAM Conn.)
IC3200(EC/KBC)
IC3300(TPM)
IC1050(CPU)
IC1050(CPU)
IC1600(ICH)
IC1420,1421,1430,1431(RAM
)
IC1440,1441,1450,1451(RAM
)
CN1410(RAM Conn.)
IC1050(CPU)
IC1600(ICH)
IC1000(Clock Generator)